Merge tag 'u-boot-imx-20190313' of git://git.denx.de/u-boot-imx

Small fixes in several i.MX boards
----------------------------------

- imx8: add pinctrl driveri (mx8m), fix documentation and
  fix reported CPU frequency. Fabio is co-maintainer
- pico-imx6ul: switch to DM
- local fixes for ventana, mx6ul_14x14_evk, engicam,
  imx6(q)_logic, liteboard

drivers/mtd/nand/raw/mxs_nand_spl.c

@@ -174,11 +174,11 @@ static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt)
 }
 
 /* setup mtd and nand structs and init mxs_nand driver */
-static int mxs_nand_init(void)
+void nand_init(void)
 {
 	/* return if already initalized */
 	if (nand_chip.numchips)
-		return 0;
+		return;
 
 	/* init mxs nand driver */
 	mxs_nand_init_spl(&nand_chip);
@@ -191,7 +191,8 @@ static int mxs_nand_init(void)
 	/* identify flash device */
 	if (mxs_flash_ident(mtd)) {
 		printf("Failed to identify\n");
-		return -1;
+		nand_chip.numchips = 0; /* If fail, don't use nand */
+		return;
 	}
 
 	/* allocate and initialize buffers */
@@ -202,8 +203,6 @@ static int mxs_nand_init(void)
 	mtd->size = nand_chip.chipsize;
 	nand_chip.scan_bbt(mtd);
 	mxs_nand_setup_ecc(mtd);
-
-	return 0;
 }
 
 int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
@@ -213,9 +212,9 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
 	unsigned int nand_page_per_block;
 	unsigned int sz = 0;
 
-	if (mxs_nand_init())
-		return -ENODEV;
 	chip = mtd_to_nand(mtd);
+	if (!chip->numchips)
+		return -ENODEV;
 	page = offs >> chip->page_shift;
 	nand_page_per_block = mtd->erasesize / mtd->writesize;
 
@@ -256,10 +255,6 @@ int nand_default_bbt(struct mtd_info *mtd)
 	return 0;
 }
 
-void nand_init(void)
-{
-}
-
 void nand_deselect(void)
 {
 }

drivers/net/fec_mxc.c

@@ -1284,22 +1284,16 @@ static int fec_phy_init(struct fec_priv *priv, struct udevice *dev)
 {
 	struct phy_device *phydev;
 	int addr;
-	int mask = 0xffffffff;
 
 	addr = device_get_phy_addr(dev);
-	if (addr >= 0)
-		mask = 1 << addr;
-
 #ifdef CONFIG_FEC_MXC_PHYADDR
-	mask = 1 << CONFIG_FEC_MXC_PHYADDR;
+	addr = CONFIG_FEC_MXC_PHYADDR;
 #endif
 
-	phydev = phy_find_by_mask(priv->bus, mask, priv->interface);
+	phydev = phy_connect(priv->bus, addr, dev, priv->interface);
 	if (!phydev)
 		return -ENODEV;
 
-	phy_connect_dev(phydev, dev);
-
 	priv->phydev = phydev;
 	phy_config(phydev);
 

drivers/pinctrl/nxp/Kconfig

@@ -75,6 +75,20 @@ config PINCTRL_IMX8
 	  only parses the 'fsl,pins' property and configures related
 	  registers.
 
+config PINCTRL_IMX8M
+	bool "IMX8M pinctrl driver"
+	depends on ARCH_IMX8M && PINCTRL_FULL
+	select DEVRES
+	select PINCTRL_IMX
+	help
+	  Say Y here to enable the imx8m pinctrl driver
+
+	  This provides a simple pinctrl driver for i.MX8M SoC familiy.
+	  This feature depends on device tree configuration. This driver
+	  is different from the linux one, this is a simple implementation,
+	  only parses the 'fsl,pins' property and configure related
+	  registers.
+
 config PINCTRL_VYBRID
 	bool "Vybrid (vf610) pinctrl driver"
 	depends on ARCH_VF610 && PINCTRL_FULL

drivers/pinctrl/nxp/Makefile

@@ -5,4 +5,5 @@ obj-$(CONFIG_PINCTRL_IMX7)		+= pinctrl-imx7.o
 obj-$(CONFIG_PINCTRL_IMX7ULP)		+= pinctrl-imx7ulp.o
 obj-$(CONFIG_PINCTRL_IMX_SCU)		+= pinctrl-scu.o
 obj-$(CONFIG_PINCTRL_IMX8)		+= pinctrl-imx8.o
+obj-$(CONFIG_PINCTRL_IMX8M)		+= pinctrl-imx8m.o
 obj-$(CONFIG_PINCTRL_VYBRID)		+= pinctrl-vf610.o

drivers/pinctrl/nxp/pinctrl-imx8m.c

@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+#include <dm/device.h>
+#include <dm/pinctrl.h>
+
+#include "pinctrl-imx.h"
+
+static struct imx_pinctrl_soc_info imx8mq_pinctrl_soc_info;
+
+static int imx8mq_pinctrl_probe(struct udevice *dev)
+{
+	struct imx_pinctrl_soc_info *info =
+		(struct imx_pinctrl_soc_info *)dev_get_driver_data(dev);
+
+	return imx_pinctrl_probe(dev, info);
+}
+
+static const struct udevice_id imx8m_pinctrl_match[] = {
+	{ .compatible = "fsl,imx8mq-iomuxc", .data = (ulong)&imx8mq_pinctrl_soc_info },
+	{ .compatible = "fsl,imx8mm-iomuxc", .data = (ulong)&imx8mq_pinctrl_soc_info },
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(imx8mq_pinctrl) = {
+	.name = "imx8mq-pinctrl",
+	.id = UCLASS_PINCTRL,
+	.of_match = of_match_ptr(imx8m_pinctrl_match),
+	.probe = imx8mq_pinctrl_probe,
+	.remove = imx_pinctrl_remove,
+	.priv_auto_alloc_size = sizeof(struct imx_pinctrl_priv),
+	.ops = &imx_pinctrl_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};

drivers/serial/serial_mxc.c

@@ -178,7 +178,7 @@ static void _mxc_serial_setbrg(struct mxc_uart *base, unsigned long clk,
 	writel(UCR1_UARTEN, &base->cr1);
 }
 
-#ifndef CONFIG_DM_SERIAL
+#if !CONFIG_IS_ENABLED(DM_SERIAL)
 
 #ifndef CONFIG_MXC_UART_BASE
 #error "define CONFIG_MXC_UART_BASE to use the MXC UART driver"
@@ -260,7 +260,7 @@ __weak struct serial_device *default_serial_console(void)
 }
 #endif
 
-#ifdef CONFIG_DM_SERIAL
+#if CONFIG_IS_ENABLED(DM_SERIAL)
 
 int mxc_serial_setbrg(struct udevice *dev, int baudrate)
 {