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x86: ivybridge: Check the RTC return value

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The RTC can fail, so check the return value for reads.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Simon Glass
2015-10-18 15:55:33 -06:00
parent 53327d3e61
commit 9fbc5ccd79
1 changed files with 10 additions and 3 deletions
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13
arch/x86/cpu/ivybridge/sdram.c
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@@ -107,11 +107,18 @@ static int read_seed_from_cmos(struct pei_data *pei_data)
* the flash too much. So we store these in CMOS and the large MRC * the flash too much. So we store these in CMOS and the large MRC
* data in SPI flash. * data in SPI flash.
*/ */
rtc_read32(dev, CMOS_OFFSET_MRC_SEED, &pei_data->scrambler_seed); ret = rtc_read32(dev, CMOS_OFFSET_MRC_SEED, &pei_data->scrambler_seed);
if (!ret) {
ret = rtc_read32(dev, CMOS_OFFSET_MRC_SEED_S3,
&pei_data->scrambler_seed_s3);
}
if (ret) {
debug("Failed to read from RTC %s\n", dev->name);
return ret;
}
debug("Read scrambler seed 0x%08x from CMOS 0x%02x\n", debug("Read scrambler seed 0x%08x from CMOS 0x%02x\n",
pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED); pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED);
rtc_read32(dev, CMOS_OFFSET_MRC_SEED_S3, &pei_data->scrambler_seed_s3);
debug("Read S3 scrambler seed 0x%08x from CMOS 0x%02x\n", debug("Read S3 scrambler seed 0x%08x from CMOS 0x%02x\n",
pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3); pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3);