Merge branch 'master' of git://git.denx.de/u-boot-spi

arch/arm/include/asm/arch-am33xx/hardware_am43xx.h

@@ -98,4 +98,7 @@
 
 #define NUM_CRYSTAL_FREQ			0x4
 
+/* EDMA3 Base Address */
+#define EDMA3_BASE				0x49000000
+
 #endif /* __AM43XX_HARDWARE_AM43XX_H */

drivers/mtd/spi/Makefile

@@ -20,4 +20,3 @@ obj-$(CONFIG_SPI_FLASH) += sf_ops.o sf_params.o
 obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o
 obj-$(CONFIG_SPI_FLASH_MTD) += sf_mtd.o
 obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o
-obj-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o

drivers/mtd/spi/eeprom_m95xxx.c

@@ -1,111 +0,0 @@
-/*
- * Copyright (C) 2009
- * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <spi.h>
-
-#define SPI_EEPROM_WREN		0x06
-#define SPI_EEPROM_RDSR		0x05
-#define SPI_EEPROM_READ		0x03
-#define SPI_EEPROM_WRITE	0x02
-
-#ifndef CONFIG_DEFAULT_SPI_BUS
-#define CONFIG_DEFAULT_SPI_BUS 0
-#endif
-
-#ifndef CONFIG_DEFAULT_SPI_MODE
-#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
-#endif
-
-#ifndef CONFIG_SYS_SPI_WRITE_TOUT
-#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
-#endif
-
-ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
-{
-	struct spi_slave *slave;
-	u8 cmd = SPI_EEPROM_READ;
-
-	slave = spi_setup_slave(CONFIG_DEFAULT_SPI_BUS, 1, 1000000,
-			CONFIG_DEFAULT_SPI_MODE);
-	if (!slave)
-		return 0;
-
-	spi_claim_bus(slave);
-
-	/* command */
-	if (spi_xfer(slave, 8, &cmd, NULL, SPI_XFER_BEGIN))
-		return -1;
-
-	/*
-	 * if alen == 3, addr[0] is the block number, we never use it here.
-	 * All we need are the lower 16 bits.
-	 */
-	if (alen == 3)
-		addr++;
-
-	/* address, and data */
-	if (spi_xfer(slave, 16, addr, NULL, 0))
-		return -1;
-	if (spi_xfer(slave, 8 * len, NULL, buffer, SPI_XFER_END))
-		return -1;
-
-	spi_release_bus(slave);
-	spi_free_slave(slave);
-	return len;
-}
-
-ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
-{
-	struct spi_slave *slave;
-	char buf[3];
-	ulong start;
-
-	slave = spi_setup_slave(CONFIG_DEFAULT_SPI_BUS, 1, 1000000,
-			CONFIG_DEFAULT_SPI_MODE);
-	if (!slave)
-		return 0;
-
-	spi_claim_bus(slave);
-
-	buf[0] = SPI_EEPROM_WREN;
-	if (spi_xfer(slave, 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END))
-		return -1;
-
-	buf[0] = SPI_EEPROM_WRITE;
-
-	/* As for reading, drop addr[0] if alen is 3 */
-	if (alen == 3) {
-		alen--;
-		addr++;
-	}
-
-	memcpy(buf + 1, addr, alen);
-	/* command + addr, then data */
-	if (spi_xfer(slave, 24, buf, NULL, SPI_XFER_BEGIN))
-		return -1;
-	if (spi_xfer(slave, len * 8, buffer, NULL, SPI_XFER_END))
-		return -1;
-
-	start = get_timer(0);
-	do {
-		buf[0] = SPI_EEPROM_RDSR;
-		buf[1] = 0;
-		spi_xfer(slave, 16, buf, buf, SPI_XFER_BEGIN | SPI_XFER_END);
-
-		if (!(buf[1] & 1))
-			break;
-
-	} while (get_timer(start) < CONFIG_SYS_SPI_WRITE_TOUT);
-
-	if (buf[1] & 1)
-		printf("*** spi_write: Timeout while writing!\n");
-
-	spi_release_bus(slave);
-	spi_free_slave(slave);
-	return len;
-}

drivers/mtd/spi/sf_internal.h

@@ -64,6 +64,7 @@ enum spi_nor_option_flags {
 #define SPI_FLASH_CFI_MFR_SPANSION	0x01
 #define SPI_FLASH_CFI_MFR_STMICRO	0x20
 #define SPI_FLASH_CFI_MFR_MACRONIX	0xc2
+#define SPI_FLASH_CFI_MFR_SST		0xbf
 #define SPI_FLASH_CFI_MFR_WINBOND	0xef
 
 /* Erase commands */

drivers/mtd/spi/sf_ops.c

@@ -583,7 +583,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
 }
 #endif
 
-#ifdef CONFIG_SPI_FLASH_STMICRO
+#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs,
 				 u32 *len)
 {
@@ -663,8 +663,11 @@ int stm_lock(struct spi_flash *flash, u32 ofs, size_t len)
 	u8 status_old, status_new;
 	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 	u8 shift = ffs(mask) - 1, pow, val;
+	int ret;
 
-	spi_flash_cmd_read_status(flash, &status_old);
+	ret = spi_flash_cmd_read_status(flash, &status_old);
+	if (ret < 0)
+		return ret;
 
 	/* SPI NOR always locks to the end */
 	if (ofs + len != flash->size) {
@@ -714,8 +717,11 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 	uint8_t status_old, status_new;
 	u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
 	u8 shift = ffs(mask) - 1, pow, val;
+	int ret;
 
-	spi_flash_cmd_read_status(flash, &status_old);
+	ret = spi_flash_cmd_read_status(flash, &status_old);
+	if (ret < 0)
+		return ret;
 
 	/* Cannot unlock; would unlock larger region than requested */
 	if (stm_is_locked_sr(flash, status_old, ofs - flash->erase_size,
@@ -750,4 +756,4 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 
 	return 0;
 }
-#endif  /* CONFIG_SPI_FLASH_STMICRO */
+#endif

drivers/mtd/spi/sf_probe.c

@@ -164,14 +164,15 @@ static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
 	flash->memory_map = spi->memory_map;
 	flash->dual_flash = flash->spi->option;
 
+	/* Assign spi flash flags */
+	if (params->flags & SST_WR)
+		flash->flags |= SNOR_F_SST_WR;
+
 	/* Assign spi_flash ops */
 #ifndef CONFIG_DM_SPI_FLASH
 	flash->write = spi_flash_cmd_write_ops;
 #if defined(CONFIG_SPI_FLASH_SST)
-	if (params->flags & SST_WR)
+	if (flash->flags & SNOR_F_SST_WR) {
-		flash->flags |= SNOR_F_SST_WR;
-
-	if (params->flags & SNOR_F_SST_WR) {
 		if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
 			flash->write = sst_write_bp;
 		else
@@ -184,8 +185,9 @@ static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
 
 	/* lock hooks are flash specific - assign them based on idcode0 */
 	switch (idcode[0]) {
-#ifdef CONFIG_SPI_FLASH_STMICRO
+#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 	case SPI_FLASH_CFI_MFR_STMICRO:
+	case SPI_FLASH_CFI_MFR_SST:
 		flash->flash_lock = stm_lock;
 		flash->flash_unlock = stm_unlock;
 		flash->flash_is_locked = stm_is_locked;

drivers/spi/ti_qspi.c

@@ -170,6 +170,8 @@ void spi_cs_deactivate(struct spi_slave *slave)
 	debug("spi_cs_deactivate: 0x%08x\n", (u32)slave);
 
 	writel(qslave->cmd | QSPI_INVAL, &qslave->base->cmd);
+	/* dummy readl to ensure bus sync */
+	readl(&qslave->base->cmd);
 }
 
 void spi_init(void)

include/configs/am43xx_evm.h

@@ -231,6 +231,8 @@
 #define CONFIG_QSPI_SEL_GPIO                   48
 #define CONFIG_SF_DEFAULT_SPEED                48000000
 #define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
+#define CONFIG_QSPI_QUAD_SUPPORT
+#define CONFIG_TI_EDMA3
 
 /* Enhance our eMMC support / experience. */
 #define CONFIG_CMD_GPT