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treewide: replace with error() with pr_err()

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U-Boot widely uses error() as a bit noisier variant of printf().

This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:

  # define __compiletime_error(message) __attribute__((error(message)))

This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux.  (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)

Let's convert error() into now treewide-available pr_err().

Done with the help of Coccinelle, excluing tools/ directory.

The semantic patch I used is as follows:

// <smpl>
@@@@
-error
+pr_err
 (...)
// </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Masahiro Yamada
2017-09-16 14:10:41 +09:00
committed by Tom Rini
parent b44b30260f
commit 9b643e312d
128 changed files with 560 additions and 560 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-omap2/am33xx/board.c
View File

@@ -241,7 +241,7 @@ int arch_misc_init(void)
#if defined(CONFIG_DM_ETH) && defined(CONFIG_USB_ETHER)
ret = usb_ether_init();
if (ret) {
error("USB ether init failed\n");
pr_err("USB ether init failed\n");
return ret;
}
#endif

4
arch/arm/mach-omap2/utils.c
View File

@@ -87,13 +87,13 @@ static u32 omap_mmc_get_part_size(const char *part)
dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
error("invalid mmc device\n");
pr_err("invalid mmc device\n");
return 0;
}
res = part_get_info_by_name(dev_desc, part, &info);
if (res < 0) {
error("cannot find partition: '%s'\n", part);
pr_err("cannot find partition: '%s'\n", part);
return 0;
}

2
arch/arm/mach-rockchip/rk3188-board-spl.c
View File

@@ -151,7 +151,7 @@ void board_init_f(ulong dummy)
*/
pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
if (IS_ERR(pmu))
error("pmu syscon returned %ld\n", PTR_ERR(pmu));
pr_err("pmu syscon returned %ld\n", PTR_ERR(pmu));
SAVE_SP_ADDR = readl(&pmu->sys_reg[2]);
ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);

2
arch/arm/mach-rockchip/rk3188-board.c
View File

@@ -26,7 +26,7 @@ int board_late_init(void)
grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
if (IS_ERR(grf)) {
error("grf syscon returned %ld\n", PTR_ERR(grf));
pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
} else {
/* enable noc remap to mimic legacy loaders */
rk_clrsetreg(&grf->soc_con0,

4
arch/arm/mach-rockchip/rk3368-board-spl.c
View File

@@ -38,13 +38,13 @@ void board_init_f(ulong dummy)
/* Set up our preloader console */
ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
if (ret) {
error("%s: pinctrl init failed: %d\n", __func__, ret);
pr_err("%s: pinctrl init failed: %d\n", __func__, ret);
hang();
}
ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART0);
if (ret) {
error("%s: failed to set up console UART\n", __func__);
pr_err("%s: failed to set up console UART\n", __func__);
hang();
}

2
arch/arm/mach-socfpga/reset_manager_arria10.c
View File

@@ -174,7 +174,7 @@ void socfpga_emac_manage_reset(ulong emacbase, u32 state)
emacmask = ALT_RSTMGR_PER0MODRST_EMAC2_SET_MSK;
break;
default:
error("emac base address unexpected! %lx", emacbase);
pr_err("emac base address unexpected! %lx", emacbase);
hang();
break;
}

8
arch/arm/mach-tegra/ivc.c
View File

@@ -493,7 +493,7 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,
(TEGRA_IVC_ALIGN - 1));
if ((uint64_t)nframes * (uint64_t)frame_size >= 0x100000000) {
error("tegra_ivc: nframes * frame_size overflows\n");
pr_err("tegra_ivc: nframes * frame_size overflows\n");
return -EINVAL;
}
@@ -503,12 +503,12 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,
*/
if ((qbase1 & (TEGRA_IVC_ALIGN - 1)) ||
(qbase2 & (TEGRA_IVC_ALIGN - 1))) {
error("tegra_ivc: channel start not aligned\n");
pr_err("tegra_ivc: channel start not aligned\n");
return -EINVAL;
}
if (frame_size & (TEGRA_IVC_ALIGN - 1)) {
error("tegra_ivc: frame size not adequately aligned\n");
pr_err("tegra_ivc: frame size not adequately aligned\n");
return -EINVAL;
}
@@ -521,7 +521,7 @@ static int check_ivc_params(ulong qbase1, ulong qbase2, uint32_t nframes,
}
if (ret) {
error("tegra_ivc: queue regions overlap\n");
pr_err("tegra_ivc: queue regions overlap\n");
return ret;
}

2
arch/arm/mach-tegra/tegra124/xusb-padctl.c
View File

@@ -137,7 +137,7 @@ static int tegra_xusb_padctl_disable(struct tegra_xusb_padctl *padctl)
u32 value;
if (padctl->enable == 0) {
error("unbalanced enable/disable");
pr_err("unbalanced enable/disable");
return 0;
}

4
arch/arm/mach-tegra/tegra186/nvtboot_mem.c
View File

@@ -45,12 +45,12 @@ int dram_init(void)
node = fdt_path_offset(nvtboot_blob, "/memory");
if (node < 0) {
error("Can't find /memory node in nvtboot DTB");
pr_err("Can't find /memory node in nvtboot DTB");
hang();
}
prop = fdt_getprop(nvtboot_blob, node, "reg", &len);
if (!prop) {
error("Can't find /memory/reg property in nvtboot DTB");
pr_err("Can't find /memory/reg property in nvtboot DTB");
hang();
}

6
arch/arm/mach-tegra/tegra20/clock.c
View File

@@ -667,7 +667,7 @@ static int tegra_plle_train(void)
} while (--timeout);
if (timeout == 0) {
error("timeout waiting for PLLE to become ready");
pr_err("timeout waiting for PLLE to become ready");
return -ETIMEDOUT;
}
@@ -697,7 +697,7 @@ int tegra_plle_enable(void)
if ((value & PLLE_MISC_PLL_READY) == 0) {
err = tegra_plle_train();
if (err < 0) {
error("failed to train PLLE: %d", err);
pr_err("failed to train PLLE: %d", err);
return err;
}
}
@@ -726,7 +726,7 @@ int tegra_plle_enable(void)
} while (--timeout);
if (timeout == 0) {
error("timeout waiting for PLLE to lock");
pr_err("timeout waiting for PLLE to lock");
return -ETIMEDOUT;
}

2
arch/arm/mach-tegra/tegra210/xusb-padctl.c
View File

@@ -125,7 +125,7 @@ static int tegra_xusb_padctl_disable(struct tegra_xusb_padctl *padctl)
u32 value;
if (padctl->enable == 0) {
error("unbalanced enable/disable");
pr_err("unbalanced enable/disable");
return 0;
}

6
arch/arm/mach-tegra/tegra30/clock.c
View File

@@ -696,7 +696,7 @@ static int tegra_plle_train(void)
} while (--timeout);
if (timeout == 0) {
error("timeout waiting for PLLE to become ready");
pr_err("timeout waiting for PLLE to become ready");
return -ETIMEDOUT;
}
@@ -726,7 +726,7 @@ int tegra_plle_enable(void)
if ((value & PLLE_MISC_PLL_READY) == 0) {
err = tegra_plle_train();
if (err < 0) {
error("failed to train PLLE: %d", err);
pr_err("failed to train PLLE: %d", err);
return err;
}
}
@@ -772,7 +772,7 @@ int tegra_plle_enable(void)
} while (--timeout);
if (timeout == 0) {
error("timeout waiting for PLLE to lock");
pr_err("timeout waiting for PLLE to lock");
return -ETIMEDOUT;
}

22
arch/arm/mach-tegra/xusb-padctl-common.c
View File

@@ -84,7 +84,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
len = ofnode_read_string_count(node, "nvidia,lanes");
if (len < 0) {
error("failed to parse \"nvidia,lanes\" property");
pr_err("failed to parse \"nvidia,lanes\" property");
return -EINVAL;
}
@@ -94,7 +94,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
ret = ofnode_read_string_index(node, "nvidia,lanes", i,
&group->pins[i]);
if (ret) {
error("failed to read string from \"nvidia,lanes\" property");
pr_err("failed to read string from \"nvidia,lanes\" property");
return -EINVAL;
}
}
@@ -104,7 +104,7 @@ tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
ret = ofnode_read_string_index(node, "nvidia,function", 0,
&group->func);
if (ret) {
error("failed to parse \"nvidia,func\" property");
pr_err("failed to parse \"nvidia,func\" property");
return -EINVAL;
}
@@ -157,14 +157,14 @@ tegra_xusb_padctl_group_apply(struct tegra_xusb_padctl *padctl,
lane = tegra_xusb_padctl_find_lane(padctl, group->pins[i]);
if (!lane) {
error("no lane for pin %s", group->pins[i]);
pr_err("no lane for pin %s", group->pins[i]);
continue;
}
func = tegra_xusb_padctl_lane_find_function(padctl, lane,
group->func);
if (func < 0) {
error("function %s invalid for lane %s: %d",
pr_err("function %s invalid for lane %s: %d",
group->func, lane->name, func);
continue;
}
@@ -206,7 +206,7 @@ tegra_xusb_padctl_config_apply(struct tegra_xusb_padctl *padctl,
err = tegra_xusb_padctl_group_apply(padctl, group);
if (err < 0) {
error("failed to apply group %s: %d",
pr_err("failed to apply group %s: %d",
group->name, err);
continue;
}
@@ -232,7 +232,7 @@ tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl,
err = tegra_xusb_padctl_group_parse_dt(padctl, group, subnode);
if (err < 0) {
error("failed to parse group %s", group->name);
pr_err("failed to parse group %s", group->name);
return err;
}
@@ -250,7 +250,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl,
err = ofnode_read_resource(node, 0, &padctl->regs);
if (err < 0) {
error("registers not found");
pr_err("registers not found");
return err;
}
@@ -261,7 +261,7 @@ static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl,
err = tegra_xusb_padctl_config_parse_dt(padctl, config,
subnode);
if (err < 0) {
error("failed to parse entry %s: %d",
pr_err("failed to parse entry %s: %d",
config->name, err);
continue;
}
@@ -289,7 +289,7 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count,
err = tegra_xusb_padctl_parse_dt(&padctl, nodes[i]);
if (err < 0) {
error("failed to parse DT: %d", err);
pr_err("failed to parse DT: %d", err);
continue;
}
@@ -298,7 +298,7 @@ int tegra_xusb_process_nodes(ofnode nodes[], unsigned int count,
err = tegra_xusb_padctl_config_apply(&padctl, &padctl.config);
if (err < 0) {
error("failed to apply pinmux: %d", err);
pr_err("failed to apply pinmux: %d", err);
continue;
}