Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL"
This reverts commit 90c08d9e08
.
I took a closer look at this after the commit was applied, and found
CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much. 8KB memory for SPL is
actually too big for some boards. Perhaps 0x800 is enough, but the
situation varies board by board.
Let's postpone our decision until we come up with a better idea.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
00709f5697
commit
9b1b6d4225
1
Kconfig
1
Kconfig
@ -83,7 +83,6 @@ config SYS_MALLOC_F
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config SYS_MALLOC_F_LEN
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hex "Size of malloc() pool before relocation"
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depends on SYS_MALLOC_F
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default 0x2000 if SPL_DM && SPL_OF_CONTROL
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default 0x400
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help
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Before relocation, memory is very limited on many platforms. Still,
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_CLEARFOG=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_LIBDISK_SUPPORT=y
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_DB_88F6720=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_DB_88F6820_GP=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_DB_MV784MP_GP=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_DS414=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_MAXBCM=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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@ -1,5 +1,6 @@
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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@ -1,5 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
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@ -1,5 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
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@ -1,5 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc"
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@ -1,5 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_SOCFPGA_IS1=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
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@ -1,5 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_SOCFPGA_DENX_MCVEVK=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk"
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@ -1,5 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"
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@ -1,5 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
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@ -1,5 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_SOCFPGA_SR1500=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
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@ -1,5 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_SOCFPGA=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA=y
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CONFIG_SPL_STACK_R_ADDR=0x00800000
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CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga"
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_THEADORABLE=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_THEADORABLE=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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@ -1,5 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_UNIPHIER=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ARCH_UNIPHIER_LD11=y
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CONFIG_MICRO_SUPPORT_CARD=y
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CONFIG_SYS_TEXT_BASE=0x84000000
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@ -1,5 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_UNIPHIER=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ARCH_UNIPHIER_LD20=y
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CONFIG_MICRO_SUPPORT_CARD=y
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CONFIG_SYS_TEXT_BASE=0x84000000
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CONFIG_ARM=y
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CONFIG_ARCH_UNIPHIER=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ARCH_UNIPHIER_LD4_SLD8=y
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CONFIG_MICRO_SUPPORT_CARD=y
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CONFIG_SYS_TEXT_BASE=0x84000000
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CONFIG_ARM=y
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CONFIG_ARCH_UNIPHIER=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_MICRO_SUPPORT_CARD=y
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CONFIG_SYS_TEXT_BASE=0x84000000
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CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref"
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CONFIG_ARM=y
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CONFIG_ARCH_UNIPHIER=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ARCH_UNIPHIER_PRO5_PXS2_LD6B=y
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CONFIG_MICRO_SUPPORT_CARD=y
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CONFIG_SYS_TEXT_BASE=0x84000000
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@ -1,5 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_UNIPHIER=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ARCH_UNIPHIER_SLD3=y
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CONFIG_MICRO_SUPPORT_CARD=y
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CONFIG_SYS_TEXT_BASE=0x84000000
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