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ppc: xilinx-ppc440: Remove support for ml507

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ml507 is just a specialized version of the xilinx-ppc440-generic

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Ricardo Ribalda Delgado
2016-01-26 11:24:04 +01:00
committed by Michal Simek
parent 9e4de7fd4a
commit 9ac0efd292
9 changed files with 0 additions and 129 deletions
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12
board/xilinx/ml507/Kconfig
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@@ -1,12 +0,0 @@
if TARGET_ML507
config SYS_BOARD
default "ml507"
config SYS_VENDOR
default "xilinx"
config SYS_CONFIG_NAME
default "ml507"
endif

7
board/xilinx/ml507/MAINTAINERS
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@@ -1,7 +0,0 @@
ML507 BOARD
M: Ricardo Ribalda <ricardo.ribalda@uam.es>
S: Maintained
F: board/xilinx/ml507/
F: include/configs/ml507.h
F: configs/ml507_defconfig
F: configs/ml507_flash_defconfig

11
board/xilinx/ml507/Makefile
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@@ -1,11 +0,0 @@
#
# (C) Copyright 2008
# Ricardo Ribalda,Universidad Autonoma de Madrid, ricardo.ribalda@uam.es
# This work has been supported by: Qtechnology http://qtec.com/
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += ml507.o
include $(srctree)/board/xilinx/ppc440-generic/Makefile

17
board/xilinx/ml507/ml507.c
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@@ -1,17 +0,0 @@
/*
* (C) Copyright 2008
* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
* This work has been supported by: QTechnology http://qtec.com/
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <common.h>
#include <asm/processor.h>
int checkboard(void)
{
puts("Xilinx ML507 Board\n");
return 0;
}

23
board/xilinx/ml507/xparameters.h
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@@ -1,23 +0,0 @@
/*
* (C) Copyright 2008
* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
* This work has been supported by: QTechnology http://qtec.com/
* based on xparameters-ml507.h by Xilinx
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef XPARAMETER_H
#define XPARAMETER_H
#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000
#define XPAR_IIC_EEPROM_BASEADDR 0x81600000
#define XPAR_INTC_0_BASEADDR 0x81800000
#define XPAR_UARTLITE_0_BASEADDR 0x84000000
#define XPAR_FLASH_MEM0_BASEADDR 0xFE000000
#define XPAR_PLB_CLOCK_FREQ_HZ 100000000
#define XPAR_CORE_CLOCK_FREQ_HZ 400000000
#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13
#define XPAR_UARTLITE_0_BAUDRATE 9600
#endif