reset: Add Allwinner RESET driver

Add common reset driver for all Allwinner SoC's.

Since CLK and RESET share common DT compatible, it is CLK driver
job is to bind the reset driver. So add CLK bind call on respective
SoC driver by passing ccu map descriptor so-that reset deassert,
deassert operations held based on ccu reset table defined from
CLK driver.

Select DM_RESET via CLK_SUNXI, this make hidden section of RESET
since CLK and RESET share common DT compatible and code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Jagan Teki
2019-01-18 22:18:13 +05:30
parent 0d47bc7056
commit 99ba430870
6 changed files with 186 additions and 1 deletions

View File

@@ -1,6 +1,7 @@
config CLK_SUNXI
bool "Clock support for Allwinner SoCs"
depends on CLK && ARCH_SUNXI
select DM_RESET
default y
help
This enables support for common clock driver API on Allwinner

View File

@@ -10,6 +10,7 @@
#include <errno.h>
#include <asm/arch/ccu.h>
#include <dt-bindings/clock/sun50i-a64-ccu.h>
#include <dt-bindings/reset/sun50i-a64-ccu.h>
static const struct ccu_clk_gate a64_gates[] = {
[CLK_BUS_OTG] = GATE(0x060, BIT(23)),
@@ -26,10 +27,28 @@ static const struct ccu_clk_gate a64_gates[] = {
[CLK_USB_OHCI1] = GATE(0x0cc, BIT(17)),
};
static const struct ccu_reset a64_resets[] = {
[RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
[RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
[RST_USB_HSIC] = RESET(0x0cc, BIT(2)),
[RST_BUS_OTG] = RESET(0x2c0, BIT(23)),
[RST_BUS_EHCI0] = RESET(0x2c0, BIT(24)),
[RST_BUS_EHCI1] = RESET(0x2c0, BIT(25)),
[RST_BUS_OHCI0] = RESET(0x2c0, BIT(28)),
[RST_BUS_OHCI1] = RESET(0x2c0, BIT(29)),
};
static const struct ccu_desc a64_ccu_desc = {
.gates = a64_gates,
.resets = a64_resets,
};
static int a64_clk_bind(struct udevice *dev)
{
return sunxi_reset_bind(dev, ARRAY_SIZE(a64_resets));
}
static const struct udevice_id a64_ccu_ids[] = {
{ .compatible = "allwinner,sun50i-a64-ccu",
.data = (ulong)&a64_ccu_desc },
@@ -43,4 +62,5 @@ U_BOOT_DRIVER(clk_sun50i_a64) = {
.priv_auto_alloc_size = sizeof(struct ccu_priv),
.ops = &sunxi_clk_ops,
.probe = sunxi_clk_probe,
.bind = a64_clk_bind,
};