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reset: Add Allwinner RESET driver

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Add common reset driver for all Allwinner SoC's.

Since CLK and RESET share common DT compatible, it is CLK driver
job is to bind the reset driver. So add CLK bind call on respective
SoC driver by passing ccu map descriptor so-that reset deassert,
deassert operations held based on ccu reset table defined from
CLK driver.

Select DM_RESET via CLK_SUNXI, this make hidden section of RESET
since CLK and RESET share common DT compatible and code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Jagan Teki
2019-01-18 22:18:13 +05:30
parent 0d47bc7056
commit 99ba430870
6 changed files with 186 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

33
arch/arm/include/asm/arch-sunxi/ccu.h
View File

@@ -8,12 +8,14 @@
#define _ASM_ARCH_CCU_H
/**
* enum ccu_flags - ccu clock flags
* enum ccu_flags - ccu clock/reset flags
*
* @CCU_CLK_F_IS_VALID: is given clock gate is valid?
* @CCU_RST_F_IS_VALID: is given reset control is valid?
*/
enum ccu_flags {
CCU_CLK_F_IS_VALID = BIT(0),
CCU_RST_F_IS_VALID = BIT(1),
};
/**
@@ -34,13 +36,33 @@ struct ccu_clk_gate {
.flags = CCU_CLK_F_IS_VALID, \
}
/**
* struct ccu_reset - ccu reset
* @off: reset offset
* @bit: reset bit
* @flags: ccu reset control flags
*/
struct ccu_reset {
u16 off;
u32 bit;
enum ccu_flags flags;
};
#define RESET(_off, _bit) { \
.off = _off, \
.bit = _bit, \
.flags = CCU_RST_F_IS_VALID, \
}
/**
* struct ccu_desc - clock control unit descriptor
*
* @gates: clock gates
* @resets: reset unit
*/
struct ccu_desc {
const struct ccu_clk_gate *gates;
const struct ccu_reset *resets;
};
/**
@@ -62,4 +84,13 @@ int sunxi_clk_probe(struct udevice *dev);
extern struct clk_ops sunxi_clk_ops;
/**
* sunxi_reset_bind() - reset binding
*
* @dev: reset device
* @count: reset count
* @return 0 success, or error value
*/
int sunxi_reset_bind(struct udevice *dev, ulong count);
#endif /* _ASM_ARCH_CCU_H */