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Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx

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- Fixes DDR initialization failure on PowerPC boards like P3041DS,
  P4080DS
This commit is contained in:
Tom Rini 2020-04-12 08:10:13 -04:00
commit 98985791b8
1 changed files with 7 additions and 6 deletions
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13
drivers/ddr/fsl/mpc85xx_ddr_gen3.c
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@ -370,8 +370,6 @@ step2:
debug("Setting DEBUG_3[21] to 0x%08x\n", in_be32(&ddr->debug[2]));
#endif /* part 1 of the workaound */
/* Always start in self-refresh, clear after MEM_EN */
setbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_FRC_SR);
/*
* 500 painful micro-seconds must elapse between
@ -384,6 +382,8 @@ step2:
#ifdef CONFIG_DEEP_SLEEP
if (is_warm_boot()) {
/* enter self-refresh */
setbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_FRC_SR);
/* do board specific memory setup */
board_mem_sleep_setup();
temp_sdram_cfg = (in_be32(&ddr->sdram_cfg) | SDRAM_CFG_BI);
@ -395,10 +395,6 @@ step2:
out_be32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN);
asm volatile("sync;isync");
/* Exit self-refresh after DDR conf as some ddr memories can fail. */
clrbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_FRC_SR);
asm volatile("sync;isync");
total_gb_size_per_controller = 0;
for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
if (!(regs->cs[i].config & 0x80000000))
@ -548,4 +544,9 @@ step2:
clrbits_be32(&ddr->sdram_cfg, 0x2);
}
#endif /* CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134 */
#ifdef CONFIG_DEEP_SLEEP
if (is_warm_boot())
/* exit self-refresh */
clrbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_FRC_SR);
#endif
}