omap3: cm-t35: move the SMC911x code
Extract the SMC911x initialization code to a common location where it can be reused by other compulab omap3 based boards. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Reviewed-by: Tom Rini <trini@ti.com>
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@ -23,6 +23,7 @@
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#include <linux/compiler.h>
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#include <asm/io.h>
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#include <asm/errno.h>
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#include <asm/arch/mem.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/mmc_host_def.h>
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@ -42,16 +43,6 @@ const omap3_sysinfo sysinfo = {
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"NAND",
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};
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static u32 gpmc_net_config[GPMC_MAX_REG] = {
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NET_GPMC_CONFIG1,
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NET_GPMC_CONFIG2,
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NET_GPMC_CONFIG3,
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NET_GPMC_CONFIG4,
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NET_GPMC_CONFIG5,
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NET_GPMC_CONFIG6,
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0
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};
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#ifdef CONFIG_SPL_BUILD
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/*
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* Routine: get_board_mem_timings
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@ -391,37 +382,12 @@ int board_mmc_init(bd_t *bis)
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}
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#endif
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/*
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* Routine: setup_net_chip_gmpc
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* Description: Setting up the configuration GPMC registers specific to the
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* Ethernet hardware.
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*/
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static void setup_net_chip_gmpc(void)
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{
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struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
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enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[5],
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CM_T3X_SMC911X_BASE, GPMC_SIZE_16M);
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enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[4],
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SB_T35_SMC911X_BASE, GPMC_SIZE_16M);
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/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
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writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
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/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
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writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
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/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
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writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
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&ctrl_base->gpmc_nadv_ale);
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}
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#ifdef CONFIG_SYS_I2C_OMAP34XX
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/*
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* Routine: reset_net_chip
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* Description: reset the Ethernet controller via TPS65930 GPIO
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*/
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static void reset_net_chip(void)
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static int cm_t3x_reset_net_chip(int gpio)
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{
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/* Set GPIO1 of TPS65930 as output */
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twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x03,
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@ -436,9 +402,10 @@ static void reset_net_chip(void)
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twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, TWL4030_BASEADD_GPIO + 0x0C,
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0x02);
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mdelay(1);
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return 0;
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}
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#else
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static inline void reset_net_chip(void) {}
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static inline int cm_t3x_reset_net_chip(int gpio) { return 0; }
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#endif
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#ifdef CONFIG_SMC911X
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@ -465,7 +432,6 @@ static int handle_mac_address(void)
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return eth_setenv_enetaddr("ethaddr", enetaddr);
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}
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/*
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* Routine: board_eth_init
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* Description: initialize module and base-board Ethernet chips
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@ -474,18 +440,16 @@ int board_eth_init(bd_t *bis)
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{
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int rc = 0, rc1 = 0;
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setup_net_chip_gmpc();
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reset_net_chip();
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rc1 = handle_mac_address();
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if (rc1)
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printf("No MAC address found! ");
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rc1 = smc911x_initialize(0, CM_T3X_SMC911X_BASE);
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rc1 = cl_omap3_smc911x_init(0, 5, CM_T3X_SMC911X_BASE,
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cm_t3x_reset_net_chip, -EINVAL);
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if (rc1 > 0)
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rc++;
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rc1 = smc911x_initialize(1, SB_T35_SMC911X_BASE);
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rc1 = cl_omap3_smc911x_init(1, 4, SB_T35_SMC911X_BASE, NULL, -EINVAL);
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if (rc1 > 0)
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rc++;
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@ -10,3 +10,4 @@ obj-y += common.o
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obj-$(CONFIG_SYS_I2C) += eeprom.o
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obj-$(CONFIG_LCD) += omap3_display.o
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obj-$(CONFIG_SPLASH_SCREEN) += splash.o
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obj-$(CONFIG_SMC911X) += omap3_smc911x.o
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@ -33,4 +33,15 @@ static inline int cl_splash_screen_prepare(int nand_offset)
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}
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#endif /* CONFIG_SPLASH_SCREEN */
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#ifdef CONFIG_SMC911X
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int cl_omap3_smc911x_init(int id, int cs, u32 base_addr,
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int (*reset)(int), int rst_gpio);
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#else /* !CONFIG_SMC911X */
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static inline int cl_omap3_smc911x_init(int id, int cs, u32 base_addr,
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int (*reset)(int), int rst_gpio)
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{
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return -ENOSYS;
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}
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#endif /* CONFIG_SMC911X */
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#endif /* _CL_COMMON_ */
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93
board/compulab/common/omap3_smc911x.c
Normal file
93
board/compulab/common/omap3_smc911x.c
Normal file
@ -0,0 +1,93 @@
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/*
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* (C) Copyright 2014 CompuLab, Ltd. <www.compulab.co.il>
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*
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* Authors: Igor Grinberg <grinberg@compulab.co.il>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <asm/errno.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/mem.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include "common.h"
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static u32 cl_omap3_smc911x_gpmc_net_config[GPMC_MAX_REG] = {
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NET_GPMC_CONFIG1,
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NET_GPMC_CONFIG2,
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NET_GPMC_CONFIG3,
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NET_GPMC_CONFIG4,
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NET_GPMC_CONFIG5,
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NET_GPMC_CONFIG6,
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0
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};
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static void cl_omap3_smc911x_setup_net_chip_gmpc(int cs, u32 base_addr)
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{
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struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
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enable_gpmc_cs_config(cl_omap3_smc911x_gpmc_net_config,
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&gpmc_cfg->cs[cs], base_addr, GPMC_SIZE_16M);
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/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
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writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
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/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
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writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
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/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
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writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
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&ctrl_base->gpmc_nadv_ale);
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}
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#ifdef CONFIG_OMAP_GPIO
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static int cl_omap3_smc911x_reset_net_chip(int gpio)
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{
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int err;
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if (!gpio_is_valid(gpio))
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return -EINVAL;
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err = gpio_request(gpio, "eth rst");
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if (err)
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return err;
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/* Set gpio as output and send a pulse */
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gpio_direction_output(gpio, 1);
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udelay(1);
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gpio_set_value(gpio, 0);
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mdelay(40);
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gpio_set_value(gpio, 1);
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mdelay(1);
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return 0;
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}
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#else /* !CONFIG_OMAP_GPIO */
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static inline int cl_omap3_smc911x_reset_net_chip(int gpio) { return 0; }
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#endif /* CONFIG_OMAP_GPIO */
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int cl_omap3_smc911x_init(int id, int cs, u32 base_addr,
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int (*reset)(int), int rst_gpio)
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{
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int ret;
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cl_omap3_smc911x_setup_net_chip_gmpc(cs, base_addr);
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if (reset)
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reset(rst_gpio);
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else
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cl_omap3_smc911x_reset_net_chip(rst_gpio);
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ret = smc911x_initialize(id, base_addr);
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if (ret > 0)
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return ret;
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printf("Failed initializing SMC911x! ");
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return 0;
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}
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