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Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE

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The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2022-10-20 18:22:39 -06:00 committed by Tom Rini
parent 6f38d91158
commit 984639039f
1118 changed files with 1632 additions and 1267 deletions
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2
Kconfig
View File

@ -274,7 +274,7 @@ config HAS_CUSTOM_SYS_INIT_SP_ADDR
config CUSTOM_SYS_INIT_SP_ADDR
hex "Static location for the initial stack pointer"
depends on HAS_CUSTOM_SYS_INIT_SP_ADDR
default SYS_TEXT_BASE if TFABOOT
default TEXT_BASE if TFABOOT
config SYS_MALLOC_F
bool "Enable malloc() pool before relocation"

26
Makefile
View File

@ -1028,7 +1028,7 @@ LDFLAGS_u-boot += -z notext $(call ld-option,--apply-dynamic-relocs)
LDFLAGS_u-boot += --build-id=none
ifeq ($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA),)
LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
LDFLAGS_u-boot += -Ttext $(CONFIG_TEXT_BASE)
endif
# insure the checker run with the right endianness
@ -1311,7 +1311,7 @@ shell_cmd = { $(call echo-cmd,$(1)) $(cmd_$(1)); }
quiet_cmd_objcopy_uboot = OBJCOPY $@
ifdef cmd_static_rela
cmd_objcopy_uboot = $(cmd_objcopy) && $(call shell_cmd,static_rela,$<,$@,$(CONFIG_SYS_TEXT_BASE)) || { rm -f $@; false; }
cmd_objcopy_uboot = $(cmd_objcopy) && $(call shell_cmd,static_rela,$<,$@,$(CONFIG_TEXT_BASE)) || { rm -f $@; false; }
else
cmd_objcopy_uboot = $(cmd_objcopy)
endif
@ -1365,7 +1365,7 @@ u-boot.ldr.hex u-boot.ldr.srec: u-boot.ldr FORCE
# from the SPL U-Boot version.
#
ifndef CONFIG_SYS_UBOOT_START
CONFIG_SYS_UBOOT_START := $(CONFIG_SYS_TEXT_BASE)
CONFIG_SYS_UBOOT_START := $(CONFIG_TEXT_BASE)
endif
# Boards with more complex image requirements can provide an .its source file
@ -1390,7 +1390,7 @@ endif
ifdef CONFIG_SPL_LOAD_FIT
MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-p $(CONFIG_FIT_EXTERNAL_OFFSET) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(DEVICE_TREE))) \
@ -1398,10 +1398,10 @@ MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtbo,$(subst ",,$(CONFIG_OF_OVERLAY_LIST)))
else
MKIMAGEFLAGS_u-boot.img = -A $(ARCH) -T firmware -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
MKIMAGEFLAGS_u-boot-ivt.img = -A $(ARCH) -T firmware_ivt -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
u-boot-ivt.img: MKIMAGEOUTPUT = u-boot-ivt.img.log
endif
@ -1420,10 +1420,10 @@ KWD_CONFIG_FILE = $(shell \
fi)
MKIMAGEFLAGS_u-boot.kwb = -n $(KWD_CONFIG_FILE) \
-T kwbimage -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE)
-T kwbimage -a $(CONFIG_TEXT_BASE) -e $(CONFIG_TEXT_BASE)
MKIMAGEFLAGS_u-boot-spl.kwb = -n $(KWD_CONFIG_FILE) \
-T kwbimage -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) \
-T kwbimage -a $(CONFIG_TEXT_BASE) -e $(CONFIG_TEXT_BASE) \
$(if $(KEYDIR),-k $(KEYDIR))
MKIMAGEFLAGS_u-boot.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
@ -1432,7 +1432,7 @@ MKIMAGEFLAGS_u-boot.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \
UBOOT_BIN := u-boot.bin
MKIMAGEFLAGS_u-boot-lzma.img = -A $(ARCH) -T standalone -C lzma -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
u-boot.bin.lzma: u-boot.bin FORCE
@ -1540,7 +1540,7 @@ u-boot.uim: u-boot.bin FORCE
u-boot-with-spl.imx u-boot-with-nand-spl.imx: SPL $(if $(CONFIG_OF_SEPARATE),u-boot.img,u-boot.uim) FORCE
$(Q)$(MAKE) $(build)=arch/arm/mach-imx $@
MKIMAGEFLAGS_u-boot.ubl = -n $(UBL_CONFIG) -T ublimage -e $(CONFIG_SYS_TEXT_BASE)
MKIMAGEFLAGS_u-boot.ubl = -n $(UBL_CONFIG) -T ublimage -e $(CONFIG_TEXT_BASE)
u-boot.ubl: u-boot-with-spl.bin FORCE
$(call if_changed,mkimage)
@ -1684,8 +1684,8 @@ u-boot-img-spl-at-end.bin: u-boot.img spl/u-boot-spl.bin FORCE
quiet_cmd_u-boot-elf ?= LD $@
cmd_u-boot-elf ?= $(LD) u-boot-elf.o -o $@ \
$(if $(CONFIG_SYS_BIG_ENDIAN),-EB,-EL) \
-T u-boot-elf.lds --defsym=$(CONFIG_PLATFORM_ELFENTRY)=$(CONFIG_SYS_TEXT_BASE) \
-Ttext=$(CONFIG_SYS_TEXT_BASE)
-T u-boot-elf.lds --defsym=$(CONFIG_PLATFORM_ELFENTRY)=$(CONFIG_TEXT_BASE) \
-Ttext=$(CONFIG_TEXT_BASE)
u-boot.elf: u-boot.bin u-boot-elf.lds
$(Q)$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
$(call if_changed,u-boot-elf)
@ -1706,7 +1706,7 @@ u-boot-mtk.bin: u-boot-with-spl.bin
$(call if_changed,copy)
else
MKIMAGEFLAGS_u-boot-mtk.bin = -T mtk_image \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) \
-a $(CONFIG_TEXT_BASE) -e $(CONFIG_TEXT_BASE) \
-n "$(patsubst "%",%,$(CONFIG_MTK_BROM_HEADER_INFO))"
u-boot-mtk.bin: u-boot.bin FORCE

2
arch/arc/cpu/u-boot.lds
View File

@ -10,7 +10,7 @@ OUTPUT_ARCH(arc)
ENTRY(_start)
SECTIONS
{
. = CONFIG_SYS_TEXT_BASE;
. = CONFIG_TEXT_BASE;
__image_copy_start = .;
. = ALIGN(1024);
__ivt_start = .;

2
arch/arm/Kconfig
View File

@ -93,7 +93,7 @@ config LNX_KRNL_IMG_TEXT_OFFSET_BASE
depends on LINUX_KERNEL_IMAGE_HEADER
hex
help
The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
The value subtracted from CONFIG_TEXT_BASE to calculate the
TEXT_OFFSET value written to the Linux kernel image header.
config GICV2

2
arch/arm/cpu/arm1176/start.S
View File

@ -88,7 +88,7 @@ cpu_init_crit:
/* Prepare to disable the MMU */
adr r2, mmu_disable_phys
sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_TEXT_BASE)
b mmu_disable
.align 5

4
arch/arm/cpu/arm926ejs/mxs/Makefile
View File

@ -60,14 +60,14 @@ spl/u-boot-spl.ivt: spl/u-boot-spl.bin
u-boot.ivt: u-boot.bin
$(call if_changed,mkalign_mxs)
$(call if_changed,mkivt_mxs,$(CONFIG_SYS_TEXT_BASE),\
$(call if_changed,mkivt_mxs,$(CONFIG_TEXT_BASE),\
0x40001000,0x40001040)
spl/u-boot-spl.csf: spl/u-boot-spl.ivt spl/u-boot-spl.bin board/$(VENDOR)/$(BOARD)/sign/u-boot-spl.csf
$(call if_changed,mkcsfreq_mxs,$(CONFIG_SPL_TEXT_BASE),0x8000)
u-boot.csf: u-boot.ivt u-boot.bin board/$(VENDOR)/$(BOARD)/sign/u-boot.csf
$(call if_changed,mkcsfreq_mxs,$(CONFIG_SYS_TEXT_BASE),0x40001000)
$(call if_changed,mkcsfreq_mxs,$(CONFIG_TEXT_BASE),0x40001000)
%.sig: %.csf
$(call if_changed,mkcst_mxs)

6
arch/arm/cpu/armv7/ls102xa/fdt.c
View File

@ -146,9 +146,9 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
* Since second uboot binary has a head, that space need to be
* reserved either(assuming its size is less than 0x1000).
*/
off = fdt_add_mem_rsv(blob, CONFIG_SYS_TEXT_BASE - UBOOT_HEAD_LEN,
CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_SPL_MALLOC_SIZE +
UBOOT_HEAD_LEN);
off = fdt_add_mem_rsv(blob, CONFIG_TEXT_BASE - UBOOT_HEAD_LEN,
CONFIG_SYS_MONITOR_LEN +
CONFIG_SYS_SPL_MALLOC_SIZE + UBOOT_HEAD_LEN);
if (off < 0)
printf("Failed to reserve memory for SD boot deep sleep: %s\n",
fdt_strerror(off));

2
arch/arm/cpu/armv8/linux-kernel-image-header-vars.h
View File

@ -69,7 +69,7 @@
(__HEAD_FLAG_PAGE_SIZE << 1) | \
(__HEAD_FLAG_PHYS_BASE << 3))
#define TEXT_OFFSET (CONFIG_SYS_TEXT_BASE - \
#define TEXT_OFFSET (CONFIG_TEXT_BASE - \
CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE)
/*

2
arch/arm/cpu/armv8/start.S
View File

@ -35,7 +35,7 @@ _start:
.globl _TEXT_BASE
_TEXT_BASE:
.quad CONFIG_SYS_TEXT_BASE
.quad CONFIG_TEXT_BASE
/*
* These are defined in the linker script.

2
arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
View File

@ -36,7 +36,7 @@
os = "u-boot";
arch = "arm";
compression = "none";
load = <CONFIG_SYS_TEXT_BASE>;
load = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
};

2
arch/arm/dts/imx8mm-u-boot.dtsi
View File

@ -90,7 +90,7 @@
arch = "arm64";
compression = "none";
description = "U-Boot (64-bit)";
load = <CONFIG_SYS_TEXT_BASE>;
load = <CONFIG_TEXT_BASE>;
type = "standalone";
uboot-blob {

2
arch/arm/dts/imx8mn-u-boot.dtsi
View File

@ -152,7 +152,7 @@
arch = "arm64";
compression = "none";
description = "U-Boot (64-bit)";
load = <CONFIG_SYS_TEXT_BASE>;
load = <CONFIG_TEXT_BASE>;
type = "standalone";
uboot-blob {

2
arch/arm/dts/imx8mp-u-boot.dtsi
View File

@ -113,7 +113,7 @@
type = "standalone";
arch = "arm64";
compression = "none";
load = <CONFIG_SYS_TEXT_BASE>;
load = <CONFIG_TEXT_BASE>;
uboot_blob: blob-ext {
filename = "u-boot-nodtb.bin";

2
arch/arm/dts/imx8mq-cm-u-boot.dtsi
View File

@ -77,7 +77,7 @@
type = "standalone";
arch = "arm64";
compression = "none";
load = <CONFIG_SYS_TEXT_BASE>;
load = <CONFIG_TEXT_BASE>;
uboot_blob: blob-ext {
filename = "u-boot-nodtb.bin";

2
arch/arm/dts/imx8mq-u-boot.dtsi
View File

@ -105,7 +105,7 @@
arch = "arm64";
compression = "none";
description = "U-Boot (64-bit)";
load = <CONFIG_SYS_TEXT_BASE>;
load = <CONFIG_TEXT_BASE>;
type = "standalone";
uboot-blob {

2
arch/arm/dts/rockchip-optee.dtsi
View File

@ -21,7 +21,7 @@
os = "U-Boot";
arch = "arm";
compression = "none";
load = <CONFIG_SYS_TEXT_BASE>;
load = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
};

2
arch/arm/dts/sunxi-u-boot.dtsi
View File

@ -47,7 +47,7 @@
os = "u-boot";
arch = "arm64";
compression = "none";
load = <CONFIG_SYS_TEXT_BASE>;
load = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
};

2
arch/arm/dts/tegra-u-boot.dtsi
View File

@ -1,7 +1,7 @@
#include <config.h>
#ifdef CONFIG_SPL_TEXT_BASE
#define U_BOOT_OFFSET (CONFIG_SYS_TEXT_BASE - CONFIG_SPL_TEXT_BASE)
#define U_BOOT_OFFSET (CONFIG_TEXT_BASE - CONFIG_SPL_TEXT_BASE)
#else
#define U_BOOT_OFFSET 0
#endif

2
arch/arm/include/asm/arch-mxs/sys_proto.h
View File

@ -85,7 +85,7 @@ static const struct mxs_pair mxs_boot_modes[] = {
#define MXS_BM_SDMMC1_3V3 0x0a
#define MXS_BM_SDMMC1_1V8 0x1a
#define MXS_SPL_DATA ((struct mxs_spl_data *)(CONFIG_SYS_TEXT_BASE - 0x200))
#define MXS_SPL_DATA ((struct mxs_spl_data *)(CONFIG_TEXT_BASE - 0x200))
struct mxs_spl_data {
uint8_t boot_mode_idx;

2
arch/arm/include/asm/arch-sunxi/boot0.h
View File

@ -47,7 +47,7 @@
#ifdef CONFIG_SPL_BUILD
.word CONFIG_SPL_TEXT_BASE
#else
.word CONFIG_SYS_TEXT_BASE
.word CONFIG_TEXT_BASE
#endif
.word fel_stash - .
#else

2
arch/arm/lib/crt0.S
View File

@ -144,7 +144,7 @@ ENTRY(_main)
adr r0, _main
ldr r1, _start_ofs
add r0, r1
ldr r1, =CONFIG_SYS_TEXT_BASE
ldr r1, =CONFIG_TEXT_BASE
sub r1, r0
add lr, r1
#endif

2
arch/arm/lib/relocate_64.S
View File

@ -37,7 +37,7 @@ ENTRY(relocate_code)
* correctly apply relocations, we need to know the linked value.
*
* Linked &__image_copy_start, which we know was at
* CONFIG_SYS_TEXT_BASE, which is stored in _TEXT_BASE, as a non-
* CONFIG_TEXT_BASE, which is stored in _TEXT_BASE, as a non-
* relocated value, since it isn't a symbol reference.
*/
ldr x1, _TEXT_BASE /* x1 <- Linked &__image_copy_start */

4
arch/arm/mach-apple/Kconfig
View File

@ -1,6 +1,6 @@
if ARCH_APPLE
config SYS_TEXT_BASE
config TEXT_BASE
default 0x00000000
config SYS_CONFIG_NAME
@ -16,6 +16,6 @@ config SYS_MALLOC_F_LEN
default 0x4000
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
default SYS_TEXT_BASE
default TEXT_BASE
endif

2
arch/arm/mach-aspeed/Kconfig
View File

@ -6,7 +6,7 @@ config SYS_ARCH
config SYS_SOC
default "aspeed"
config SYS_TEXT_BASE
config TEXT_BASE
default 0x00000000
choice

4
arch/arm/mach-at91/arm920t/lowlevel_init.S
View File

@ -22,9 +22,9 @@
_MTEXT_BASE:
#undef START_FROM_MEM
#ifdef START_FROM_MEM
.word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1
.word CONFIG_TEXT_BASE-PHYS_FLASH_1
#else
.word CONFIG_SYS_TEXT_BASE
.word CONFIG_TEXT_BASE
#endif
.globl lowlevel_init

2
arch/arm/mach-at91/arm926ejs/lowlevel_init.S
View File

@ -32,7 +32,7 @@ lowlevel_init:
POS1:
adr r5, POS1 /* r5 = POS1 run time */
ldr r0, =POS1 /* r0 = POS1 compile */
sub r5, r5, r0 /* r0 = CONFIG_SYS_TEXT_BASE-1 */
sub r5, r5, r0 /* r0 = CONFIG_TEXT_BASE-1 */
/* memory control configuration 1 */
ldr r0, =SMRDATA

10
arch/arm/mach-exynos/spl_boot.c
View File

@ -251,7 +251,7 @@ void copy_uboot_to_ram(void)
#ifdef CONFIG_SPI_BOOTING
case BOOT_MODE_SERIAL:
/* Customised function to copy u-boot from SF */
exynos_spi_copy(param->uboot_size, CONFIG_SYS_TEXT_BASE);
exynos_spi_copy(param->uboot_size, CONFIG_TEXT_BASE);
break;
#endif
case BOOT_MODE_SD:
@ -267,7 +267,7 @@ void copy_uboot_to_ram(void)
copy_bl2_from_emmc = get_irom_func(EMMC44_INDEX);
end_bootop_from_emmc = get_irom_func(EMMC44_END_INDEX);
copy_bl2_from_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE);
copy_bl2_from_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_TEXT_BASE);
end_bootop_from_emmc();
break;
#endif
@ -279,7 +279,7 @@ void copy_uboot_to_ram(void)
*/
is_cr_z_set = config_branch_prediction(0);
usb_copy = get_irom_func(USB_INDEX);
usb_copy(0, (u32 *)CONFIG_SYS_TEXT_BASE);
usb_copy(0, (u32 *)CONFIG_TEXT_BASE);
config_branch_prediction(is_cr_z_set);
break;
#endif
@ -288,7 +288,7 @@ void copy_uboot_to_ram(void)
}
if (copy_bl2)
copy_bl2(offset, size, CONFIG_SYS_TEXT_BASE);
copy_bl2(offset, size, CONFIG_TEXT_BASE);
}
void memzero(void *s, size_t n)
@ -329,7 +329,7 @@ void board_init_f(unsigned long bootflag)
copy_uboot_to_ram();
/* Jump to U-Boot image */
uboot = (void *)CONFIG_SYS_TEXT_BASE;
uboot = (void *)CONFIG_TEXT_BASE;
(*uboot)();
/* Never returns Here */
}

10
arch/arm/mach-imx/Makefile
View File

@ -126,7 +126,7 @@ DEPFILE_EXISTS := 0
endif
MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \
-T $(IMAGE_TYPE) -e $(CONFIG_SYS_TEXT_BASE)
-T $(IMAGE_TYPE) -e $(CONFIG_TEXT_BASE)
u-boot.imx: MKIMAGEOUTPUT = u-boot.imx.log
u-boot.imx: u-boot.bin u-boot.cfgout $(PLUGIN).bin FORCE
@ -134,7 +134,7 @@ u-boot.imx: u-boot.bin u-boot.cfgout $(PLUGIN).bin FORCE
ifeq ($(CONFIG_MULTI_DTB_FIT),y)
MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \
-T $(IMAGE_TYPE) -e $(CONFIG_SYS_TEXT_BASE)
-T $(IMAGE_TYPE) -e $(CONFIG_TEXT_BASE)
u-boot-dtb.imx: MKIMAGEOUTPUT = u-boot-dtb.imx.log
u-boot-dtb.imx: u-boot-fit-dtb.bin u-boot-dtb.cfgout $(PLUGIN).bin FORCE
@ -143,7 +143,7 @@ ifeq ($(DEPFILE_EXISTS),0)
endif
else ifeq ($(CONFIG_OF_SEPARATE),y)
MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \
-T $(IMAGE_TYPE) -e $(CONFIG_SYS_TEXT_BASE)
-T $(IMAGE_TYPE) -e $(CONFIG_TEXT_BASE)
u-boot-dtb.imx: MKIMAGEOUTPUT = u-boot-dtb.imx.log
u-boot-dtb.imx: u-boot-dtb.bin u-boot-dtb.cfgout $(PLUGIN).bin FORCE
@ -207,8 +207,8 @@ SPL: MKIMAGEOUTPUT = SPL.log
SPL: spl/u-boot-spl.bin spl/u-boot-spl.cfgout $(PLUGIN).bin FORCE
$(call if_changed,mkimage)
MKIMAGEFLAGS_u-boot.uim = -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \
-e $(CONFIG_SYS_TEXT_BASE) -C none -T firmware
MKIMAGEFLAGS_u-boot.uim = -A arm -O U-Boot -a $(CONFIG_TEXT_BASE) \
-e $(CONFIG_TEXT_BASE) -C none -T firmware
u-boot.uim: u-boot.bin FORCE
$(call if_changed,mkimage)

4
arch/arm/mach-imx/imx8/cpu.c
View File

@ -313,8 +313,8 @@ phys_size_t get_effective_memsize(void)
/* Find the memory region runs the U-Boot */
if (start >= phys_sdram_1_start && start <= end1 &&
(start <= CONFIG_SYS_TEXT_BASE &&
end >= CONFIG_SYS_TEXT_BASE)) {
(start <= CONFIG_TEXT_BASE &&
end >= CONFIG_TEXT_BASE)) {
if ((end + 1) <=
((sc_faddr_t)phys_sdram_1_start +
phys_sdram_1_size))

2
arch/arm/mach-imx/mx7/Kconfig
View File

@ -16,7 +16,7 @@ config MX7D
select ROM_UNIFIED_SECTIONS
imply CMD_FUSE
config SYS_TEXT_BASE
config TEXT_BASE
default 0x87800000
config SPL_TEXT_BASE

2
arch/arm/mach-imx/spl.c
View File

@ -341,7 +341,7 @@ void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len)
if (bl_len < 512)
bl_len = 512;
return (void *)((CONFIG_SYS_TEXT_BASE - fit_size - bl_len -
return (void *)((CONFIG_TEXT_BASE - fit_size - bl_len -
align_len) & ~align_len);
}
#endif

2
arch/arm/mach-ipq40xx/Kconfig
View File

@ -6,7 +6,7 @@ config SYS_SOC
config SYS_MALLOC_F_LEN
default 0x2000
config SYS_TEXT_BASE
config TEXT_BASE
default 0x87300000
config NR_DRAM_BANKS

2
arch/arm/mach-k3/config_secure.mk
View File

@ -30,7 +30,7 @@ tispl.bin_HS: $(obj)/u-boot-spl-nodtb.bin_HS $(patsubst %,$(obj)/dts/%.dtb_HS,$(
$(call if_changed,mkfitimage)
MKIMAGEFLAGS_u-boot.img_HS = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtb_HS,$(subst ",,$(CONFIG_OF_LIST)))

2
arch/arm/mach-k3/sysfw-loader.c
View File

@ -91,7 +91,7 @@ static void *sysfw_load_address;
struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)
{
if (sysfw_loaded)
return (struct legacy_img_hdr *)(CONFIG_SYS_TEXT_BASE + offset);
return (struct legacy_img_hdr *)(CONFIG_TEXT_BASE + offset);
else if (sysfw_load_address)
return sysfw_load_address;
else

2
arch/arm/mach-keystone/config.mk
View File

@ -27,7 +27,7 @@ u-boot-spi.gph: spl/u-boot-spl.gph u-boot.img FORCE
ifndef CONFIG_SPL_BUILD
MKIMAGEFLAGS_MLO = -A $(ARCH) -T gpimage -C none \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) -n U-Boot
-a $(CONFIG_TEXT_BASE) -e $(CONFIG_TEXT_BASE) -n U-Boot
MLO: u-boot.bin FORCE
$(call if_changed,mkimage)
@dd if=/dev/zero bs=8 count=1 2>/dev/null >> $@

6
arch/arm/mach-nexell/include/mach/boot0.h
View File

@ -5,7 +5,7 @@
* The NSIH (first 512 Bytes of u-boot.bin) is necessary for the
* 2nd-Bootloader to get information like load address of U-Boot.
*
* 0x400 must be added to CONFIG_SYS_TEXT_BASE to have the actual load and
* 0x400 must be added to CONFIG_TEXT_BASE to have the actual load and
* start address because 2nd-Bootloader loads with an offset of 0x400
* (NSIH + 0x200 bytes are not loaded into RAM).
*
@ -23,9 +23,9 @@
.word (_end - _start) + 20 * 1024 /* 0x50: load size
* (bin + 20k for DTB) */
.space 0x4
.word CONFIG_SYS_TEXT_BASE + 0x400 /* 0x58: load address */
.word CONFIG_TEXT_BASE + 0x400 /* 0x58: load address */
.word 0x00000000
.word CONFIG_SYS_TEXT_BASE + 0x400 /* 0x60: start address */
.word CONFIG_TEXT_BASE + 0x400 /* 0x60: start address */
.space 0x198
.byte 'N' /* 0x1FC: "NSIH" signature */
.byte 'S'

2
arch/arm/mach-npcm/Kconfig
View File

@ -3,7 +3,7 @@ if ARCH_NPCM
config SYS_ARCH
default "arm"
config SYS_TEXT_BASE
config TEXT_BASE
default 0x8000
choice

2
arch/arm/mach-octeontx/cpu.c
View File

@ -46,7 +46,7 @@ struct mm_region *mem_map = otx_mem_map;
void mem_map_fill(void)
{
int banks = OTX_MEM_MAP_USED;
u32 dram_start = CONFIG_SYS_TEXT_BASE;
u32 dram_start = CONFIG_TEXT_BASE;
if (otx_is_soc(CN83XX)) {
otx_mem_map[banks].virt = 0x8c0000000000UL;

2
arch/arm/mach-octeontx2/cpu.c
View File

@ -51,7 +51,7 @@ struct mm_region *mem_map = otx2_mem_map;
void mem_map_fill(void)
{
int banks = OTX2_MEM_MAP_USED;
u32 dram_start = CONFIG_SYS_TEXT_BASE;
u32 dram_start = CONFIG_TEXT_BASE;
for (int i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
otx2_mem_map[banks].virt = dram_start;

4
arch/arm/mach-omap2/config_secure.mk
View File

@ -10,7 +10,7 @@ cmd_mkomapsecimg = $(TI_SECURE_DEV_PKG)/scripts/create-boot-image.sh \
$(if $(KBUILD_VERBOSE:1=), >/dev/null)
else
cmd_mkomapsecimg = $(TI_SECURE_DEV_PKG)/scripts/create-boot-image.sh \
$(patsubst u-boot_HS_%,%,$(@F)) $< $@ $(CONFIG_SYS_TEXT_BASE) \
$(patsubst u-boot_HS_%,%,$(@F)) $< $@ $(CONFIG_TEXT_BASE) \
$(if $(KBUILD_VERBOSE:1=), >/dev/null)
endif
else
@ -102,7 +102,7 @@ u-boot_HS_XIP_X-LOADER: $(obj)/u-boot.bin FORCE
ifdef CONFIG_SPL_LOAD_FIT
MKIMAGEFLAGS_u-boot_HS.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \
$(patsubst %,-b arch/$(ARCH)/dts/%.dtb_HS,$(subst ",,$(CONFIG_OF_LIST)))

2
arch/arm/mach-owl/Kconfig
View File

@ -14,7 +14,7 @@ config MACH_S700
endchoice
config SYS_TEXT_BASE
config TEXT_BASE
default 0x11000000
config SYS_CONFIG_NAME

2
arch/arm/mach-rockchip/Kconfig
View File

@ -431,7 +431,7 @@ config ROCKCHIP_SPI_IMAGE
is built by binman. U-Boot sits near the start of the image.
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
default SYS_TEXT_BASE
default TEXT_BASE
source "arch/arm/mach-rockchip/px30/Kconfig"
source "arch/arm/mach-rockchip/rk3036/Kconfig"

2
arch/arm/mach-socfpga/Kconfig
View File

@ -40,7 +40,7 @@ config SYS_MALLOC_F_LEN
default 0x2000 if TARGET_SOCFPGA_ARRIA10
default 0x2000 if TARGET_SOCFPGA_GEN5
config SYS_TEXT_BASE
config TEXT_BASE
default 0x01000040 if TARGET_SOCFPGA_ARRIA10
default 0x01000040 if TARGET_SOCFPGA_GEN5

2
arch/arm/mach-stm32mp/Kconfig.13x
View File

@ -19,7 +19,7 @@ config TARGET_ST_STM32MP13x
endchoice
config SYS_TEXT_BASE
config TEXT_BASE
default 0xC0000000
config PRE_CON_BUF_ADDR

2
arch/arm/mach-stm32mp/Kconfig.15x
View File

@ -93,7 +93,7 @@ config SPL_STM32MP15_PWR
This config enables implementation of driver-model pmic and
regulator uclass features for access to STM32MP15x PWR in SPL.
config SYS_TEXT_BASE
config TEXT_BASE
default 0xC0100000
config PRE_CON_BUF_ADDR

2
arch/arm/mach-sunxi/board.c
View File

@ -363,7 +363,7 @@ __weak void sunxi_sram_init(void)
static bool sunxi_valid_emmc_boot(struct mmc *mmc)
{
struct blk_desc *bd = mmc_get_blk_desc(mmc);
uint32_t *buffer = (void *)(uintptr_t)CONFIG_SYS_TEXT_BASE;
u32 *buffer = (void *)(uintptr_t)CONFIG_TEXT_BASE;
struct boot_file_head *egon_head = (void *)buffer;
int bootpart = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
uint32_t spl_size, emmc_checksum, chksum = 0;

2
arch/arm/mach-sunxi/spl_spi_sunxi.c
View File

@ -341,7 +341,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image,
struct legacy_img_hdr *header;
uint32_t load_offset = sunxi_get_spl_size();
header = (struct legacy_img_hdr *)CONFIG_SYS_TEXT_BASE;
header = (struct legacy_img_hdr *)CONFIG_TEXT_BASE;
load_offset = max_t(uint32_t, load_offset, CONFIG_SYS_SPI_U_BOOT_OFFS);
spi0_init();

2
arch/arm/mach-zynqmp/mkimage_fit_atf.sh
View File

@ -26,7 +26,7 @@ TEE_LOAD_ADDR_LOW=`printf 0x%x $((TEE_LOAD_ADDR & 0xffffffff))`
TEE_LOAD_ADDR_HIGH=`printf 0x%x $((TEE_LOAD_ADDR >> 32))`
if [ -z "$BL33_LOAD_ADDR" ];then
BL33_LOAD_ADDR=`awk '/CONFIG_SYS_TEXT_BASE/ { print $3 }' include/generated/autoconf.h`
BL33_LOAD_ADDR=`awk '/CONFIG_TEXT_BASE/ { print $3 }' include/generated/autoconf.h`
fi
BL33_LOAD_ADDR_LOW=`printf 0x%x $((BL33_LOAD_ADDR & 0xffffffff))`
BL33_LOAD_ADDR_HIGH=`printf 0x%x $((BL33_LOAD_ADDR >> 32))`

12
arch/m68k/cpu/mcf52x2/start.S
View File

@ -35,8 +35,8 @@
*/
_vectors:
.long 0x00000000 /* Flash offset is 0 until we setup CS0 */
#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
.long _start - CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_M5282) && (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
.long _start - CONFIG_TEXT_BASE
#else
.long _START
#endif
@ -83,7 +83,7 @@ _vectors:
#if defined(CONFIG_SYS_INT_FLASH_BASE) && \
(defined(CONFIG_M5282) || defined(CONFIG_M5281))
#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
#if (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
.long 0x55AA55AA,0xAA55AA55 /* CFM Backdoorkey */
.long 0xFFFFFFFF /* all sectors protected */
.long 0x00000000 /* supervisor/User restriction */
@ -130,7 +130,7 @@ _start:
movec %d0, %RAMBAR1
#if defined(CONFIG_M5282)
#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
#if (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
/*
* Setup code in SRAM to initialize FLASHBAR,
* if start from internal Flash
@ -156,7 +156,7 @@ _after_flashbar_copy:
/* Setup code to initialize FLASHBAR, if start from external Memory */
move.l #(CONFIG_SYS_INT_FLASH_BASE + CONFIG_SYS_INT_FLASH_ENABLE), %d0
movec %d0, %FLASHBAR
#endif /* (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */
#endif /* (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE) */
#endif
#endif
@ -165,7 +165,7 @@ _after_flashbar_copy:
* therefore no VBR to set
*/
#if !defined(CONFIG_MONITOR_IS_IN_RAM)
#if defined(CONFIG_M5282) && (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
#if defined(CONFIG_M5282) && (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
move.l #CONFIG_SYS_INT_FLASH_BASE, %d0
#else
move.l #CONFIG_SYS_FLASH_BASE, %d0

4
arch/m68k/cpu/mcf530x/start.S
View File

@ -39,8 +39,8 @@ _vectors:
/* Flash offset is 0 until we setup CS0 */
.long 0x00000000
#if defined(CONFIG_M5307) && \
(CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
.long _start - CONFIG_SYS_TEXT_BASE
(CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
.long _start - CONFIG_TEXT_BASE
#else
.long _START
#endif

16
arch/m68k/cpu/mcf5445x/start.S
View File

@ -26,10 +26,10 @@
rte;
#if defined(CONFIG_SERIAL_BOOT)
#define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
#define ASM_DRAMINIT (asm_dram_init - CONFIG_TEXT_BASE + \
CONFIG_SYS_INIT_RAM_ADDR)
#define ASM_DRAMINIT_N (asm_dram_init - CONFIG_SYS_TEXT_BASE)
#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
#define ASM_DRAMINIT_N (asm_dram_init - CONFIG_TEXT_BASE)
#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_TEXT_BASE + \
CONFIG_SYS_INIT_RAM_ADDR)
#endif
@ -116,7 +116,7 @@ vector192_255:
asm_sbf_img_hdr:
.long 0x00000000 /* checksum, not yet implemented */
.long 0x00040000 /* image length */
.long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
.long CONFIG_TEXT_BASE /* image to be relocated at */
asm_dram_init:
move.w #0x2700,%sr /* Mask off Interrupt */
@ -271,7 +271,7 @@ asm_dspi_rd_loop2:
jsr asm_dspi_rd_status
/* jump to memory and execute */
move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
move.l #(CONFIG_TEXT_BASE + 0x400), %a0
jmp (%a0)
asm_dspi_wr_status:
@ -298,7 +298,7 @@ asm_dspi_rd_status:
/* copy 4 boot pages to dram as soon as possible */
/* each page is 996 bytes (1056 total with 60 ECC bytes */
move.l #0x00000000, %a1 /* src */
move.l #CONFIG_SYS_TEXT_BASE, %a2 /* dst */
move.l #CONFIG_TEXT_BASE, %a2 /* dst */
move.l #0x3E0, %d0 /* sz in long */
asm_boot_nand_copy:
@ -381,7 +381,7 @@ asm_nand_init:
move.l #4, %d2 /* start at 4 */
move.l #0xFC0FFF04, %a0 /* cmd2 */
move.l #0xFC0FFF0C, %a1 /* rar */
move.l #(CONFIG_SYS_TEXT_BASE + 0xF80), %a2
move.l #(CONFIG_TEXT_BASE + 0xF80), %a2
asm_nand_read:
move.l #0x11000000, %d0 /* rar */
@ -419,7 +419,7 @@ asm_nand_copy:
bgt asm_nand_read
/* jump to memory and execute */
move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
move.l #(CONFIG_TEXT_BASE + 0x400), %a0
jmp (%a0)
#endif /* CONFIG_SYS_NAND_BOOT */

6
arch/microblaze/cpu/relocate.c
View File

@ -19,7 +19,7 @@
* @rela_start: rela section start
* @rela_end: rela section end
* @dyn_start: dynamic section start
* @origin_addr: address where u-boot starts(doesn't need to be CONFIG_SYS_TEXT_BASE)
* @origin_addr: address where u-boot starts(doesn't need to be CONFIG_TEXT_BASE)
*/
void mb_fix_rela(u32 reloc_addr, u32 verbose, u32 rela_start,
u32 rela_end, u32 dyn_start, u32 origin_addr)
@ -29,9 +29,9 @@ void mb_fix_rela(u32 reloc_addr, u32 verbose, u32 rela_start,
/*
* Return in case u-boot.elf is used directly.
* Skip it when u-boot.bin is loaded to different address than
* CONFIG_SYS_TEXT_BASE. In this case relocation is necessary to run.
* CONFIG_TEXT_BASE. In this case relocation is necessary to run.
*/
if (reloc_addr == CONFIG_SYS_TEXT_BASE) {
if (reloc_addr == CONFIG_TEXT_BASE) {
debug_cond(verbose,
"Relocation address is the same - skip relocation\n");
return;

8
arch/microblaze/cpu/start.S
View File

@ -55,15 +55,15 @@ uboot_sym_start:
add r6, r0, r0
lwi r7, r20, ALIGNMENT_ADDR
addi r7, r7, -CONFIG_SYS_TEXT_BASE
addi r7, r7, -CONFIG_TEXT_BASE
add r7, r7, r5
lwi r8, r20, ALIGNMENT_ADDR + 0x4
addi r8, r8, -CONFIG_SYS_TEXT_BASE
addi r8, r8, -CONFIG_TEXT_BASE
add r8, r8, r5
lwi r9, r20, ALIGNMENT_ADDR + 0x8
addi r9, r9, -CONFIG_SYS_TEXT_BASE
addi r9, r9, -CONFIG_TEXT_BASE
add r9, r9, r5
addi r10, r0, CONFIG_SYS_TEXT_BASE
addi r10, r0, CONFIG_TEXT_BASE
brlid r15, mb_fix_rela
nop

4
arch/mips/mach-jz47xx/jz4780/jz4780.c
View File

@ -58,7 +58,7 @@ void board_init_f(ulong dummy)
if (ret)
hang();
header = (struct legacy_img_hdr *)(CONFIG_SYS_TEXT_BASE -
header = (struct legacy_img_hdr *)(CONFIG_TEXT_BASE -
sizeof(struct legacy_img_hdr));
count = blk_dread(mmc_get_blk_desc(mmc),
@ -68,7 +68,7 @@ void board_init_f(ulong dummy)
hang();
image_entry_noargs_t image_entry =
(image_entry_noargs_t)CONFIG_SYS_TEXT_BASE;
(image_entry_noargs_t)CONFIG_TEXT_BASE;
image_entry();

2
arch/mips/mach-mscc/lowlevel_init.S
View File

@ -21,7 +21,7 @@ LEAF(lowlevel_init)
/* Modify ra/s0 such we return to physical NOR location */
li t0, 0x0fffffff
li t1, CONFIG_SYS_TEXT_BASE
li t1, CONFIG_TEXT_BASE
and s0, ra, t0
add s0, s0, t1

2
arch/mips/mach-mtmips/Kconfig
View File

@ -28,7 +28,7 @@ config SYS_ICACHE_LINE_SIZE
config SYS_SCACHE_LINE_SIZE
default 32 if SOC_MT7621
config SYS_TEXT_BASE
config TEXT_BASE
default 0x9c000000 if !SPL && !SOC_MT7621
default 0x80200000 if SPL || SOC_MT7621

4
arch/powerpc/cpu/mpc85xx/cpu_init_early.c
View File

@ -30,7 +30,7 @@ void setup_ifc(void)
_mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(15);
_mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_IPROT |
MAS1_TSIZE(BOOKE_PAGESZ_4M);
_mas2 = FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, MAS2_I|MAS2_G);
_mas2 = FSL_BOOKE_MAS2(CONFIG_TEXT_BASE, MAS2_I | MAS2_G);
_mas3 = FSL_BOOKE_MAS3(flash_phys, 0, MAS3_SW|MAS3_SR|MAS3_SX);
_mas7 = FSL_BOOKE_MAS7(flash_phys);
@ -58,7 +58,7 @@ void setup_ifc(void)
MAS0_ESEL(CONFIG_SYS_PPC_E500_DEBUG_TLB);
_mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_IPROT |
MAS1_TSIZE(BOOKE_PAGESZ_4M);
_mas2 = FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, MAS2_I|MAS2_G);
_mas2 = FSL_BOOKE_MAS2(CONFIG_TEXT_BASE, MAS2_I | MAS2_G);
_mas3 = FSL_BOOKE_MAS3(flash_phys, 0, MAS3_SW|MAS3_SR|MAS3_SX);
_mas7 = FSL_BOOKE_MAS7(flash_phys);

2
arch/powerpc/cpu/mpc85xx/u-boot.lds
View File

@ -18,7 +18,7 @@ SECTIONS
{
/* Optional boot sector */
#if defined(CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR) && !defined(CONFIG_SPL)
.bootsect CONFIG_SYS_TEXT_BASE - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA * 512 : {
.bootsect CONFIG_TEXT_BASE - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA * 512 : {
KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootsect))
. = CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA * 512;
}

4
arch/powerpc/dts/kmcent2-u-boot.dtsi
View File

@ -77,13 +77,13 @@
binman {
filename = "u-boot.bin";
skip-at-start = <CONFIG_SYS_TEXT_BASE>;
skip-at-start = <CONFIG_TEXT_BASE>;
sort-by-offset;
pad-byte = <0xff>;
size = <CONFIG_SYS_MONITOR_LEN>;
u-boot-with-ucode-ptr {
offset = <CONFIG_SYS_TEXT_BASE>;
offset = <CONFIG_TEXT_BASE>;
optional-ucode;
};

4
arch/powerpc/dts/u-boot.dtsi
View File

@ -10,13 +10,13 @@
/ {
binman {
filename = "u-boot.bin";
skip-at-start = <CONFIG_SYS_TEXT_BASE>;
skip-at-start = <CONFIG_TEXT_BASE>;
sort-by-offset;
pad-byte = <0xff>;
size = <CONFIG_SYS_MONITOR_LEN>;
u-boot-with-ucode-ptr {
offset = <CONFIG_SYS_TEXT_BASE>;
offset = <CONFIG_TEXT_BASE>;
optional-ucode;
};

2
arch/riscv/dts/binman.dtsi
View File

@ -27,7 +27,7 @@
os = "U-Boot";
arch = "riscv";
compression = "none";
load = <CONFIG_SYS_TEXT_BASE>;
load = <CONFIG_TEXT_BASE>;
uboot_blob: blob-ext {
filename = "u-boot-nodtb.bin";

2
arch/sh/cpu/u-boot.lds
View File

@ -25,7 +25,7 @@ ENTRY(_start)
SECTIONS
{
. = CONFIG_SYS_TEXT_BASE;
. = CONFIG_TEXT_BASE;
reloc_dst = .;
PROVIDE (_ftext = .);

4
arch/x86/Kconfig
View File

@ -924,8 +924,8 @@ config CACHE_QOS_SIZE_PER_BIT
config X86_OFFSET_U_BOOT
hex "Offset of U-Boot in ROM image"
depends on HAVE_SYS_TEXT_BASE
default SYS_TEXT_BASE
depends on HAVE_TEXT_BASE
default TEXT_BASE
config X86_OFFSET_SPL
hex "Offset of SPL in ROM image"

2
arch/x86/cpu/apollolake/spl.c
View File

@ -118,7 +118,7 @@ static int spl_fast_spi_load_image(struct spl_image_info *spl_image,
spl_image->size = CONFIG_SYS_MONITOR_LEN; /* We don't know SPL size */
spl_image->entry_point = spl_phase() == PHASE_TPL ?
CONFIG_SPL_TEXT_BASE : CONFIG_SYS_TEXT_BASE;
CONFIG_SPL_TEXT_BASE : CONFIG_TEXT_BASE;
spl_image->load_addr = spl_image->entry_point;
spl_image->os = IH_OS_U_BOOT;
spl_image->name = "U-Boot";

2
arch/x86/cpu/quark/quark.c
View File

@ -49,7 +49,7 @@ static void quark_setup_mtrr(void)
/* variable range MTRR#0: ROM area */
mask = ~(CONFIG_SYS_MONITOR_LEN - 1);
base = CONFIG_SYS_TEXT_BASE & mask;
base = CONFIG_TEXT_BASE & mask;
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_ROM),
base | MTRR_TYPE_WRBACK);
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYMASK(MTRR_VAR_ROM),

6
arch/x86/cpu/start.S
View File

@ -237,15 +237,15 @@ multiboot_header:
/* checksum */
.long -0x1BADB002 - (1 << 16)
/* header addr */
.long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
.long multiboot_header - _x86boot_start + CONFIG_TEXT_BASE
/* load addr */
.long CONFIG_SYS_TEXT_BASE
.long CONFIG_TEXT_BASE
/* load end addr */
.long 0
/* bss end addr */
.long 0
/* entry addr */
.long CONFIG_SYS_TEXT_BASE
.long CONFIG_TEXT_BASE
#ifdef CONFIG_X86_LOAD_FROM_32_BIT
/*

4
arch/x86/cpu/u-boot-64.lds
View File

@ -15,8 +15,8 @@ SECTIONS
/DISCARD/ : { *(__u_boot_list_2_cmd_*) }
#endif
#ifdef CONFIG_SYS_TEXT_BASE
. = CONFIG_SYS_TEXT_BASE; /* Location of bootcode in flash */
#ifdef CONFIG_TEXT_BASE
. = CONFIG_TEXT_BASE; /* Location of bootcode in flash */
#endif
__text_start = .;

2
arch/x86/cpu/u-boot.lds
View File

@ -15,7 +15,7 @@ SECTIONS
/DISCARD/ : { *(__u_boot_list_2_cmd_*) }
#endif
. = CONFIG_SYS_TEXT_BASE; /* Location of bootcode in flash */
. = CONFIG_TEXT_BASE; /* Location of bootcode in flash */
__text_start = .;
.text.start : { *(.text.start); }

6
arch/x86/lib/relocate.c
View File

@ -162,10 +162,10 @@ int do_elf_reloc_fixups(void)
if (re_src == re_end)
panic("No relocation data");
#ifdef CONFIG_SYS_TEXT_BASE
text_base = CONFIG_SYS_TEXT_BASE;
#ifdef CONFIG_TEXT_BASE
text_base = CONFIG_TEXT_BASE;
#else
panic("No CONFIG_SYS_TEXT_BASE");
panic("No CONFIG_TEXT_BASE");
#endif
#if CONFIG_IS_ENABLED(X86_64)
do_elf_reloc_fixups64(text_base, size, re_src, re_end);

6
arch/x86/lib/spl.c
View File

@ -66,7 +66,7 @@ static int x86_spl_init(void)
* TODO(sjg@chromium.org): We use this area of RAM for the stack
* and global_data in SPL. Once U-Boot starts up and releocates it
* is not needed. We could make this a CONFIG option or perhaps
* place it immediately below CONFIG_SYS_TEXT_BASE.
* place it immediately below CONFIG_TEXT_BASE.
*/
__maybe_unused char *ptr = (char *)0x110000;
#else
@ -209,8 +209,8 @@ static int spl_board_load_image(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
spl_image->size = CONFIG_SYS_MONITOR_LEN;
spl_image->entry_point = CONFIG_SYS_TEXT_BASE;
spl_image->load_addr = CONFIG_SYS_TEXT_BASE;
spl_image->entry_point = CONFIG_TEXT_BASE;
spl_image->load_addr = CONFIG_TEXT_BASE;
spl_image->os = IH_OS_U_BOOT;
spl_image->name = "U-Boot";

2
board/BuS/eb_cpu5282/eb_cpu5282.c
View File

@ -26,7 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
int checkboard (void)
{
puts("Board: EB+CPU5282 (BuS Elektronik GmbH & Co. KG)\n");
#if (CONFIG_SYS_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
#if (CONFIG_TEXT_BASE == CONFIG_SYS_INT_FLASH_BASE)
puts(" Boot from Internal FLASH\n");
#endif
return 0;

2
board/advantech/som-db5800-som-6867/Kconfig
View File

@ -12,7 +12,7 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "som-db5800-som-6867"
config SYS_TEXT_BASE
config TEXT_BASE
default 0xfff00000
config BOARD_SPECIFIC_OPTIONS # dummy

4
board/armltd/vexpress64/Kconfig
View File

@ -54,9 +54,9 @@ config JUNO_DTB_PART
device tree blob to configure U-Boot.
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
default SYS_TEXT_BASE
default TEXT_BASE
config SYS_TEXT_BASE
config TEXT_BASE
default 0x88000000 if TARGET_VEXPRESS64_BASE_FVP
default 0xe0000000 if TARGET_VEXPRESS64_JUNO
default 0x00001000 if TARGET_VEXPRESS64_BASER_FVP

2
board/beacon/beacon-rzg2m/beacon-rzg2m.c
View File

@ -12,7 +12,7 @@ DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000;
return 0;
}

4
board/broadcom/bcmstb/bcmstb.c
View File

@ -61,13 +61,13 @@ int dram_init_banksize(void)
/*
* On this SoC, U-Boot is running as an ELF file. Change the
* relocation address to CONFIG_SYS_TEXT_BASE, so that in
* relocation address to CONFIG_TEXT_BASE, so that in
* setup_reloc, gd->reloc_off works out to 0, effectively
* disabling relocation. Otherwise U-Boot hangs in the setup
* instructions just before relocate_code in
* arch/arm/lib/crt0.S.
*/
gd->relocaddr = CONFIG_SYS_TEXT_BASE;
gd->relocaddr = CONFIG_TEXT_BASE;
return 0;
}

8
board/cobra5272/README
View File

@ -89,9 +89,9 @@ please first check:
=> u-boot as single bootloader starting from flash
in board/cobra5272/config.mk CONFIG_SYS_TEXT_BASE should be
in board/cobra5272/config.mk CONFIG_TEXT_BASE should be
CONFIG_SYS_TEXT_BASE = 0xffe00000
CONFIG_TEXT_BASE = 0xffe00000
=> linking address for u-boot as single bootloader stored in flash
@ -128,9 +128,9 @@ please modify the settings:
=> u-boot as RAM version, chainloaded by another bootloader or using bdm cable
in board/cobra5272/config.mk CONFIG_SYS_TEXT_BASE should be
in board/cobra5272/config.mk CONFIG_TEXT_BASE should be
CONFIG_SYS_TEXT_BASE = 0x00020000
CONFIG_TEXT_BASE = 0x00020000
=> target linking address for RAM

2
board/congatec/cgtqmx8/cgtqmx8.c
View File

@ -425,7 +425,7 @@ int board_late_init(void)
char *end_of_uboot;
char command[256];
end_of_uboot = (char *)(ulong)(CONFIG_SYS_TEXT_BASE + _end_ofs
end_of_uboot = (char *)(ulong)(CONFIG_TEXT_BASE + _end_ofs
+ fdt_totalsize(gd->fdt_blob));
end_of_uboot += 9;

2
board/congatec/conga-qeval20-qa3-e3845/Kconfig
View File

@ -11,7 +11,7 @@ config SYS_CONFIG_NAME
default "conga-qeval20-qa3-e3845" if TARGET_CONGA_QEVAL20_QA3_E3845
default "theadorable-x86-conga-qa3-e3845" if TARGET_THEADORABLE_X86_CONGA_QA3_E3845
config SYS_TEXT_BASE
config TEXT_BASE
default 0xfff00000
config BOARD_SPECIFIC_OPTIONS # dummy

2
board/coreboot/coreboot/Kconfig
View File

@ -9,7 +9,7 @@ config SYS_VENDOR
config SYS_SOC
default "coreboot"
config SYS_TEXT_BASE
config TEXT_BASE
default 0x01110000
config BOARD_SPECIFIC_OPTIONS # dummy

2
board/cssi/MCR3000/Kconfig
View File

@ -9,7 +9,7 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "MCR3000"
config SYS_TEXT_BASE
config TEXT_BASE
default 0x04000000
endif

2
board/davinci/da8xxevm/README.da850
View File

@ -124,7 +124,7 @@ NOR Flash is XIP (execute-in-place), so no AIS (or SPL) is needed. The
u-boot.bin is directy flashed, but CONFIT_DA850_LOWLEVEL must be set
to initialize hardware that's normally done by SPL.
For this case, CONFIG_SYS_TEXT_BASE=0x60000000 which is the address to
For this case, CONFIG_TEXT_BASE=0x60000000 which is the address to
which the bootloader jumps when powered on.
Example:

2
board/dfi/dfi-bt700/Kconfig
View File

@ -11,7 +11,7 @@ config SYS_CONFIG_NAME
default "dfi-bt700" if TARGET_Q7X_151_DFI_BT700
default "theadorable-x86-dfi-bt700" if TARGET_THEADORABLE_X86_DFI_BT700
config SYS_TEXT_BASE
config TEXT_BASE
default 0xfff00000
config BOARD_SPECIFIC_OPTIONS # dummy

2
board/efi/efi-x86_payload/Kconfig
View File

@ -12,7 +12,7 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "efi-x86_payload"
config SYS_TEXT_BASE
config TEXT_BASE
default 0x00200000
config BOARD_SPECIFIC_OPTIONS # dummy

2
board/emulation/qemu-arm/Kconfig
View File

@ -1,6 +1,6 @@
if TARGET_QEMU_ARM_32BIT || TARGET_QEMU_ARM_64BIT
config SYS_TEXT_BASE
config TEXT_BASE
default 0x00000000
config BOARD_SPECIFIC_OPTIONS # dummy

2
board/emulation/qemu-riscv/Kconfig
View File

@ -12,7 +12,7 @@ config SYS_CPU
config SYS_CONFIG_NAME
default "qemu-riscv"
config SYS_TEXT_BASE
config TEXT_BASE
default 0x81200000 if SPL
default 0x80000000 if !RISCV_SMODE
default 0x80200000 if RISCV_SMODE && ARCH_RV64I

2
board/emulation/qemu-x86/Kconfig
View File

@ -12,7 +12,7 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "qemu-x86"
config SYS_TEXT_BASE
config TEXT_BASE
default 0xfff00000 if !SUPPORT_SPL
default 0x01110000 if SUPPORT_SPL

2
board/freescale/imx8qm_mek/uboot-container.cfg
View File

@ -9,4 +9,4 @@ BOOT_FROM SD 0x400
SOC_TYPE IMX8QM
CONTAINER
IMAGE A35 bl31.bin 0x80000000
IMAGE A35 u-boot.bin CONFIG_SYS_TEXT_BASE
IMAGE A35 u-boot.bin CONFIG_TEXT_BASE

2
board/freescale/imx8qxp_mek/uboot-container.cfg
View File

@ -9,4 +9,4 @@ BOOT_FROM SD 0x400
SOC_TYPE IMX8QX
CONTAINER
IMAGE A35 bl31.bin 0x80000000
IMAGE A35 u-boot.bin CONFIG_SYS_TEXT_BASE
IMAGE A35 u-boot.bin CONFIG_TEXT_BASE

2
board/freescale/ls1021atsn/ls1021atsn.c
View File

@ -188,7 +188,7 @@ void board_init_f(ulong dummy)
* in last boot.
*/
if (is_warm_boot()) {
second_uboot = (void (*)(void))CONFIG_SYS_TEXT_BASE;
second_uboot = (void (*)(void))CONFIG_TEXT_BASE;
second_uboot();
}

2
board/freescale/ls1021atwr/ls1021atwr.c
View File

@ -439,7 +439,7 @@ void board_init_f(ulong dummy)
* in last boot.
*/
if (is_warm_boot()) {
second_uboot = (void (*)(void))CONFIG_SYS_TEXT_BASE;
second_uboot = (void (*)(void))CONFIG_TEXT_BASE;
second_uboot();
}

4
board/freescale/ls1028a/Kconfig
View File

@ -15,7 +15,7 @@ config SYS_CONFIG_NAME
config EMMC_BOOT
bool "Support for booting from EMMC"
config SYS_TEXT_BASE
config TEXT_BASE
default 0x96000000 if SD_BOOT || EMMC_BOOT
default 0x82000000 if TFABOOT
default 0x20100000
@ -51,7 +51,7 @@ config SYS_CONFIG_NAME
config EMMC_BOOT
bool "Support for booting from EMMC"
config SYS_TEXT_BASE
config TEXT_BASE
default 0x96000000 if SD_BOOT || EMMC_BOOT
default 0x82000000 if TFABOOT
default 0x20100000

2
board/google/chromebook_coral/Kconfig
View File

@ -12,7 +12,7 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "chromebook_coral"
config SYS_TEXT_BASE
config TEXT_BASE
default 0xffe00000
config BOARD_SPECIFIC_OPTIONS # dummy

2
board/google/chromebook_link/Kconfig
View File

@ -12,7 +12,7 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "chromebook_link"
config SYS_TEXT_BASE
config TEXT_BASE
default 0xfff00000 if !SUPPORT_SPL
default 0x10000000 if SUPPORT_SPL

2
board/google/chromebook_samus/Kconfig
View File

@ -13,7 +13,7 @@ config SYS_CONFIG_NAME
default "chromebook_samus" if TARGET_CHROMEBOOK_SAMUS
default "chromebook_samus" if TARGET_CHROMEBOOK_SAMUS_TPL
config SYS_TEXT_BASE
config TEXT_BASE
default 0xffe00000
config BOARD_SPECIFIC_OPTIONS # dummy

2
board/google/chromebox_panther/Kconfig
View File

@ -12,7 +12,7 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "chromebox_panther"
config SYS_TEXT_BASE
config TEXT_BASE
default 0xfff00000
# Panther actually uses haswell, not ivybridge, so this is just a placeholder

2
board/hoperun/hihope-rzg2/hihope-rzg2.c
View File

@ -39,7 +39,7 @@ int board_init(void)
u32 i;
/* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000;
/* Configure the HSUSB block */
mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);

2
board/hpe/gxp/Kconfig
View File

@ -42,5 +42,5 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "gxp"
config SYS_TEXT_BASE
config TEXT_BASE
default 0x50000000

2
board/imgtec/boston/Kconfig
View File

@ -9,7 +9,7 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "boston"
config SYS_TEXT_BASE
config TEXT_BASE
default 0x9fc00000 if 32BIT
default 0xffffffff9fc00000 if 64BIT

2
board/imgtec/ci20/Kconfig
View File

@ -9,7 +9,7 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "ci20"
config SYS_TEXT_BASE
config TEXT_BASE
default 0x80000000
endif

2
board/imgtec/malta/Kconfig
View File

@ -9,7 +9,7 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "malta"
config SYS_TEXT_BASE
config TEXT_BASE
default 0xbe000000 if 32BIT
default 0xffffffffbe000000 if 64BIT

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