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x86: qemu: Turn on PCIe ECAM address range decoding on Q35

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Turn on PCIe ECAM address range decoding on Q35.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2015-07-22 01:21:14 -07:00 committed by Simon Glass
parent a8ebf283e9
commit 9830d2ebb4
2 changed files with 8 additions and 0 deletions
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4
arch/x86/cpu/qemu/pci.c
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@ -90,6 +90,10 @@ int board_pci_post_scan(struct pci_controller *hose)
xbcs = x86_pci_read_config16(PIIX_ISA, XBCS);
xbcs |= APIC_EN;
x86_pci_write_config16(PIIX_ISA, XBCS, xbcs);
} else {
/* Configure PCIe ECAM base address */
x86_pci_write_config32(PCI_BDF(0, 0, 0), PCIEX_BAR,
CONFIG_PCIE_ECAM_BASE | BAR_EN);
}
/*

4
arch/x86/include/asm/arch-qemu/qemu.h
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@ -22,6 +22,10 @@
#define IDE1_TIM 0x42
#define IDE_DECODE_EN (1 << 15)
/* PCIe ECAM Base Address Register */
#define PCIEX_BAR 0x60
#define BAR_EN (1 << 0)
/* I/O Ports */
#define CMOS_ADDR_PORT 0x70
#define CMOS_DATA_PORT 0x71