arm: Disable ATAGs support

With the exceptions of ds109, ds414, icnova-a20-swac, nokia_rx51 and
stemmy, disable ATAG support.  A large number of platforms had enabled
support but never supported a kernel so old as to require it.  Further,
some platforms are old enough to support both, but are well supported by
devicetree booting, and have been for a number of years.  This is
because some of the ATAGs related functions have been re-used to provide
the same kind of information, but for devicetree or just generally to
inform the user.  When needed still, rename these functions to
get_board_revision() instead, to avoid conflicts.  In other cases, these
functions were simply unused, so drop them.

Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Stefan Bosch <stefan_b@posteo.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2021-08-30 09:16:30 -04:00
parent b9d66a061b
commit 9774462e34
151 changed files with 116 additions and 563 deletions

View File

@@ -196,12 +196,14 @@ int board_init(void)
return 0;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
int rev = 0;
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
#endif
/*
* called prior to booting kernel or by 'fdt boardsetup' command

View File

@@ -2,4 +2,4 @@
#
# Copyright (C) 2021 Phil Sutter <phil@nwl.cc>
obj-y += legacy.o
obj-$(SUPPORT_PASSING_ATAGS) += legacy.o

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@@ -48,6 +48,7 @@ static const u32 CCAT_MODE_RUN = 0x0033DC8F;
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@@ -59,6 +60,7 @@ u32 get_board_rev(void)
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
#endif
/*
* Set CCAT mode

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@@ -38,11 +38,6 @@ int board_init(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
void reset_cpu(void)
{
}

View File

@@ -720,10 +720,12 @@ int dram_init(void)
return 0;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return cl_eeprom_get_board_rev(CONFIG_SYS_I2C_EEPROM_BUS);
}
#endif
static struct mxc_serial_plat cm_fx6_mxc_serial_plat = {
.reg = (struct mxc_uart *)UART4_BASE,

View File

@@ -232,6 +232,7 @@ const int lpsc_size = ARRAY_SIZE(lpsc);
#define REV_AM18X_EVM 0x100
#ifdef CONFIG_REVISION_TAG
/*
* get_board_rev() - setup to pass kernel board revision information
* Returns:
@@ -259,6 +260,7 @@ u32 get_board_rev(void)
rev = 1;
return rev;
}
#endif
int board_early_init_f(void)
{

View File

@@ -143,20 +143,6 @@ const int lpsc_size = ARRAY_SIZE(lpsc);
#define CONFIG_DA850_EVM_MAX_CPU_CLK 456000000
#endif
/*
* get_board_rev() - setup to pass kernel board revision information
* Returns:
* bit[0-3] Maximum cpu clock rate supported by onboard SoC
* 0000b - 300 MHz
* 0001b - 372 MHz
* 0010b - 408 MHz
* 0011b - 456 MHz
*/
u32 get_board_rev(void)
{
return 0;
}
int board_early_init_f(void)
{
/*

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@@ -71,11 +71,6 @@ u32 spl_boot_device(void)
}
#endif
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View File

@@ -71,11 +71,6 @@ u32 spl_boot_device(void)
}
#endif
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View File

@@ -35,6 +35,7 @@ int dram_init(void)
return 0;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
u32 rev = get_cpu_rev();
@@ -42,6 +43,7 @@ u32 get_board_rev(void)
rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET;
return rev;
}
#endif
#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_HIGH)

View File

@@ -32,6 +32,7 @@
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@@ -46,6 +47,7 @@ u32 get_board_rev(void)
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
#endif
#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)

View File

@@ -321,12 +321,14 @@ static void setup_gpmi_nand(void)
}
#endif
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
int rev = nxp_board_rev();
return (get_cpu_rev() & ~(0xF << 8)) | rev;
}
#endif
static int ar8031_phy_fixup(struct phy_device *phydev)
{

View File

@@ -295,12 +295,12 @@ static void set_ether_addr(void)
env_set("ethaddr", ethaddr);
}
#ifdef CONFIG_REVISION_TAG
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
static void set_board_rev(void)
{
char info[64] = {0, };
snprintf(info, ARRAY_SIZE(info), "%02x", get_board_rev());
snprintf(info, ARRAY_SIZE(info), "%02x", get_board_revision());
env_set("board_rev", info);
}
#endif
@@ -310,7 +310,7 @@ static void set_dtb_name(void)
char info[64] = {0, };
snprintf(info, ARRAY_SIZE(info),
"s5p4418-nanopi2-rev%02x.dtb", get_board_rev());
"s5p4418-nanopi2-rev%02x.dtb", get_board_revision());
env_set("dtb_name", info);
}
@@ -436,7 +436,7 @@ int board_late_init(void)
{
bd_update_env();
#ifdef CONFIG_REVISION_TAG
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
set_board_rev();
#endif
set_dtb_name();

View File

@@ -80,11 +80,18 @@ void bd_base_rev_init(void)
}
/* To override __weak symbols */
u32 get_board_rev(void)
u32 get_board_revision(void)
{
return (base_rev << 8) | pcb_rev;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return get_board_revision();
}
#endif
const char *get_board_name(void)
{
bd_hwrev_init();

View File

@@ -9,7 +9,7 @@
extern void bd_hwrev_init(void);
extern void bd_base_rev_init(void);
extern u32 get_board_rev(void);
extern u32 get_board_revision(void);
extern const char *get_board_name(void);
#endif /* __BD_HW_REV_H__ */

View File

@@ -81,10 +81,12 @@ int dram_init_banksize(void)
return 0;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return get_cpu_rev() & ~(0xF << 8);
}
#endif
#ifdef CONFIG_USB_EHCI_MX5
int board_ehci_hcd_init(int port)

View File

@@ -27,6 +27,7 @@
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
@@ -38,6 +39,7 @@ u32 get_board_rev(void)
return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
}
#endif
struct fsl_esdhc_cfg esdhc_cfg[1] = {
{MMC_SDHC1_BASE_ADDR}

View File

@@ -156,11 +156,13 @@ int misc_init_r(void)
return 0;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
/* Sold devices are expected to be at least revision F. */
return 6;
}
#endif
void get_board_serial(struct tag_serialnr *serialnr)
{

View File

@@ -241,6 +241,7 @@ int board_init(void)
return 0;
}
#ifdef CONFIG_REVISION_TAG
/*
* Routine: get_board_revision
* Description: Return board revision.
@@ -249,6 +250,7 @@ u32 get_board_rev(void)
{
return simple_strtol(hw_build_ptr, NULL, 16);
}
#endif
/*
* Routine: setup_board_tags

View File

@@ -419,7 +419,7 @@ int misc_init_r(void)
return 0;
}
static void get_board_rev(void)
static void get_board_revision(void)
{
ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_board_rev, msg, 1);
int ret;
@@ -478,7 +478,7 @@ int board_init(void)
hw_watchdog_init();
#endif
get_board_rev();
get_board_revision();
gd->bd->bi_boot_params = 0x100;

View File

@@ -47,18 +47,6 @@ struct odroid_rev_info odroid_info[] = {
{ EXYNOS5_BOARD_ODROID_UNKNOWN, 0, 4095, "unknown" },
};
static unsigned int odroid_get_rev(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(odroid_info); i++) {
if (odroid_info[i].board_type == gd->board_type)
return odroid_info[i].board_rev;
}
return 0;
}
/*
* Read ADC at least twice and check the resuls. If regulator providing voltage
* on to measured point was just turned on, first reads might require time
@@ -200,6 +188,19 @@ bool board_is_generic(void)
return false;
}
#ifdef CONFIG_REVISION_TAG
static unsigned int odroid_get_rev(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(odroid_info); i++) {
if (odroid_info[i].board_type == gd->board_type)
return odroid_info[i].board_rev;
}
return 0;
}
/**
* get_board_rev() - return detected board revision.
*
@@ -212,6 +213,7 @@ u32 get_board_rev(void)
return odroid_get_rev();
}
#endif
/**
* get_board_type() - returns board type string.

View File

@@ -24,11 +24,6 @@
DECLARE_GLOBAL_DATA_PTR;
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
/* Set Initial global variables */

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@@ -12,11 +12,6 @@
#include <asm/arch/pinmux.h>
#include <usb.h>
u32 get_board_rev(void)
{
return 0;
}
int exynos_init(void)
{
return 0;

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@@ -67,10 +67,12 @@ static void check_hw_revision(void)
board_rev = modelrev << 8;
}
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return board_rev;
}
#endif
static inline u32 get_model_rev(void)
{

View File

@@ -33,10 +33,12 @@ DECLARE_GLOBAL_DATA_PTR;
unsigned int board_rev;
static int init_pmic_lcd(void);
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
{
return board_rev;
}
#endif
int exynos_power_init(void)
{

View File

@@ -46,11 +46,6 @@ int dram_init_banksize(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View File

@@ -40,11 +40,6 @@ int dram_init_banksize(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

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@@ -40,11 +40,6 @@ int dram_init_banksize(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View File

@@ -77,12 +77,7 @@ u32 spl_boot_device(void)
{
return BOOT_DEVICE_XIP;
}
#endif
u32 get_board_rev(void)
{
return 0;
}
int board_late_init(void)
{

View File

@@ -36,11 +36,6 @@ int dram_init_banksize(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View File

@@ -36,11 +36,6 @@ int dram_init_banksize(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

View File

@@ -41,11 +41,6 @@ int board_early_init_f(void)
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_late_init(void)
{
return 0;

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@@ -312,6 +312,7 @@ void board_mmc_power_init(void)
#endif
#endif
#ifdef CONFIG_REVISION_TAG
/*
* get_board_rev() - get board revision
*/
@@ -319,3 +320,4 @@ u32 get_board_rev(void)
{
return 0x20;
}
#endif

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@@ -104,6 +104,7 @@ int spl_start_uboot(void)
}
#endif /* CONFIG_SPL_OS_BOOT */
#ifdef CONFIG_REVISION_TAG
/*
* get_board_rev() - get board revision
*/
@@ -111,3 +112,4 @@ u32 get_board_rev(void)
{
return 0x20;
}
#endif

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@@ -707,12 +707,11 @@ int board_init(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
#if defined(CONFIG_REVISION_TAG) && \
defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
char env_str[256];
u32 rev;
rev = get_board_rev();
rev = get_board_revision();
snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
env_set("board_rev", env_str);

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@@ -611,12 +611,11 @@ int board_init(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
#if defined(CONFIG_REVISION_TAG) && \
defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
char env_str[256];
u32 rev;
rev = get_board_rev();
rev = get_board_revision();
snprintf(env_str, ARRAY_SIZE(env_str), "%.4x", rev);
env_set("board_rev", env_str);
#endif

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@@ -32,8 +32,8 @@ static char tdx_car_rev_str[6];
static char *tdx_carrier_board_name;
#endif
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
u32 get_board_revision(void)
{
/* Check validity */
if (!tdx_hw_tag.ver_major)
@@ -183,8 +183,8 @@ int ft_common_board_setup(void *blob, struct bd_info *bd)
#else /* CONFIG_TDX_CFG_BLOCK */
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void)
#if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)
u32 get_board_revision(void)
{
return 0;
}

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@@ -10,6 +10,7 @@
#define TDX_USB_VID 0x1B67
int ft_common_board_setup(void *blob, struct bd_info *bd);
u32 get_board_revision(void);
#if defined(CONFIG_DM_VIDEO)
int show_boot_logo(void);