board/t208x: update t2080qds/t2080rdb for errata A-007186
As errata A-007186, we need to use the alternate serdes protocol instead of those impacted protocols. - add support for serdes protocols: 0x1b, 0x50, 0x5e, 0x64, 0x6a, 0xd2, 0x67, 0x70. - update t2080_rcw.cfg to adapt to new rcw_66_15 for t2080qds and t2080rdb. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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@ -43,6 +43,10 @@ static const struct serdes_config serdes1_cfg_tbl[] = {
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{0x6C, {XFI_FM1_MAC9, XFI_FM1_MAC10,
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SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
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PCIE4, PCIE4, PCIE4, PCIE4} },
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{0x1B, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
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SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
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SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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{0x1C, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10,
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SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
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SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
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@ -59,18 +63,34 @@ static const struct serdes_config serdes1_cfg_tbl[] = {
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SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
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SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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{0x50, {XAUI_FM1_MAC9, XAUI_FM1_MAC9,
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XAUI_FM1_MAC9, XAUI_FM1_MAC9,
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PCIE4, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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{0x51, {XAUI_FM1_MAC9, XAUI_FM1_MAC9,
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XAUI_FM1_MAC9, XAUI_FM1_MAC9,
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PCIE4, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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{0x5E, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
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HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
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PCIE4, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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{0x5F, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
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HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
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PCIE4, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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{0x64, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
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HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
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PCIE4, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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{0x65, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
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HIGIG_FM1_MAC9, HIGIG_FM1_MAC9,
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PCIE4, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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{0x6A, {XFI_FM1_MAC9, XFI_FM1_MAC10,
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XFI_FM1_MAC1, XFI_FM1_MAC2,
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PCIE4, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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{0x6B, {XFI_FM1_MAC9, XFI_FM1_MAC10,
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XFI_FM1_MAC1, XFI_FM1_MAC2,
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PCIE4, SGMII_FM1_DTSEC4,
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@ -115,6 +135,9 @@ static const struct serdes_config serdes1_cfg_tbl[] = {
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{0xD9, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
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SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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{0xD2, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
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SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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{0xD3, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
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SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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@ -127,8 +150,6 @@ static const struct serdes_config serdes1_cfg_tbl[] = {
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{0x66, {XFI_FM1_MAC9, XFI_FM1_MAC10,
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XFI_FM1_MAC1, XFI_FM1_MAC2,
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PCIE4, PCIE4, PCIE4, PCIE4} },
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#if defined(CONFIG_PPC_T2081)
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{0xAA, {PCIE3, PCIE3, PCIE3, PCIE3,
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PCIE4, PCIE4, PCIE4, PCIE4} },
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{0xCA, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1,
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@ -137,7 +158,6 @@ static const struct serdes_config serdes1_cfg_tbl[] = {
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{0x70, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC1,
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SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4,
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SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
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#endif
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{}
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};
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@ -416,6 +416,7 @@ int board_eth_init(bd_t *bis)
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fm_info_set_phy_address(FM1_DTSEC10, RGMII_PHY2_ADDR);
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switch (srds_s1) {
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case 0x1b:
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case 0x1c:
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case 0x95:
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case 0xa2:
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@ -429,8 +430,11 @@ int board_eth_init(bd_t *bis)
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fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT3_PHY_ADDR);
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fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT4_PHY_ADDR);
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break;
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case 0x50:
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case 0x51:
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case 0x5e:
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case 0x5f:
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case 0x64:
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case 0x65:
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/* T2080QDS: XAUI/HiGig in Slot3; T2081QDS: in Slot2 */
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fm_info_set_phy_address(FM1_10GEC1, FM1_10GEC1_PHY_ADDR);
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@ -439,6 +443,7 @@ int board_eth_init(bd_t *bis)
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fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT4_PHY_ADDR);
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break;
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case 0x66:
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case 0x67:
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/*
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* XFI does not need a PHY to work, but to avoid U-boot use
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* default PHY address which is zero to a MAC when it found
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@ -453,6 +458,7 @@ int board_eth_init(bd_t *bis)
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fm_info_set_phy_address(FM1_10GEC3, 6);
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fm_info_set_phy_address(FM1_10GEC4, 7);
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break;
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case 0x6a:
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case 0x6b:
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fm_info_set_phy_address(FM1_10GEC1, 4);
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fm_info_set_phy_address(FM1_10GEC2, 5);
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@ -470,6 +476,7 @@ int board_eth_init(bd_t *bis)
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fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR);
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fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT4_PHY_ADDR);
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break;
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case 0x70:
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case 0x71:
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/* SGMII in Slot3 */
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fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR);
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@ -625,6 +632,7 @@ int board_eth_init(bd_t *bis)
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fm_info_set_mdio(i, mii_dev_for_muxval(mdio_mux[i]));
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if ((srds_s1 == 0x66) || (srds_s1 == 0x6b) ||
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(srds_s1 == 0x6a) || (srds_s1 == 0x70) ||
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(srds_s1 == 0x6c) || (srds_s1 == 0x6d) ||
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(srds_s1 == 0x71)) {
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/* As XFI is in cage intead of a slot, so
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@ -3,6 +3,6 @@ aa55aa55 010e0100
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#SerDes Protocol: 0x66_0x16
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#Core/DDR: 1533Mhz/2133MT/s
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12100017 15000000 00000000 00000000
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66160002 00008400 e8104000 c1000000
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66150002 00008400 e8104000 c1000000
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00000000 00000000 00000000 000307fc
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00000000 00000000 00000000 00000004
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@ -105,6 +105,7 @@ int brd_mux_lane_to_slot(void)
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/* SerDes1 is not enabled */
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break;
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#if defined(CONFIG_T2080QDS)
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case 0x1b:
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case 0x1c:
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case 0xa2:
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/* SD1(A:D) => SLOT3 SGMII
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@ -126,6 +127,7 @@ int brd_mux_lane_to_slot(void)
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*/
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QIXIS_WRITE(brdcfg[12], 0x3a);
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break;
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case 0x50:
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case 0x51:
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/* SD1(A:D) => SLOT3 XAUI
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* SD1(E) => SLOT1 PCIe4
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@ -140,6 +142,7 @@ int brd_mux_lane_to_slot(void)
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*/
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QIXIS_WRITE(brdcfg[12], 0xfe);
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break;
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case 0x6a:
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case 0x6b:
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/* SD1(A:D) => XFI cage
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* SD1(E) => SLOT1 PCIe4
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@ -184,6 +187,7 @@ int brd_mux_lane_to_slot(void)
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QIXIS_WRITE(brdcfg[12], 0x1a);
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break;
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#elif defined(CONFIG_T2081QDS)
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case 0x50:
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case 0x51:
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/* SD1(A:D) => SLOT2 XAUI
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* SD1(E) => SLOT1 PCIe4 x1
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@ -192,6 +196,7 @@ int brd_mux_lane_to_slot(void)
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QIXIS_WRITE(brdcfg[12], 0x98);
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QIXIS_WRITE(brdcfg[13], 0x70);
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break;
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case 0x6a:
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case 0x6b:
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/* SD1(A:D) => XFI SFP Module
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* SD1(E) => SLOT1 PCIe4 x1
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@ -201,13 +206,6 @@ int brd_mux_lane_to_slot(void)
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QIXIS_WRITE(brdcfg[13], 0x70);
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break;
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case 0x6c:
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/* SD1(A:B) => XFI SFP Module
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* SD1(C:D) => SLOT2 SGMII
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* SD1(E:H) => SLOT1 PCIe4 x4
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*/
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QIXIS_WRITE(brdcfg[12], 0xe8);
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QIXIS_WRITE(brdcfg[13], 0x0);
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break;
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case 0x6d:
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/* SD1(A:B) => XFI SFP Module
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* SD1(C:D) => SLOT2 SGMII
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@ -3,6 +3,6 @@ aa55aa55 010e0100
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#SerDes Protocol: 0x66_0x16
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#Core/DDR: 1533Mhz/1600MT/s
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120c0017 15000000 00000000 00000000
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66160002 00008400 ec104000 c1000000
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66150002 00008400 ec104000 c1000000
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00000000 00000000 00000000 000307fc
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00000000 00000000 00000000 00000004
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