stm32mp: add check of cpu identifier
Add support of DBGMCU_IDC for cpu identifier and revision Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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cda3dcb670
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@ -7,6 +7,7 @@
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#include <clk.h>
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#include <asm/io.h>
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#include <asm/arch/stm32.h>
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#include <asm/arch/sys_proto.h>
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/* RCC register */
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#define RCC_TZCR (STM32_RCC_BASE + 0x00)
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@ -31,8 +32,13 @@
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#define PWR_CR1_DBP BIT(8)
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/* DBGMCU register */
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#define DBGMCU_IDC (STM32_DBGMCU_BASE + 0x00)
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#define DBGMCU_APB4FZ1 (STM32_DBGMCU_BASE + 0x2C)
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#define DBGMCU_APB4FZ1_IWDG2 BIT(2)
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#define DBGMCU_IDC_DEV_ID_MASK GENMASK(11, 0)
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#define DBGMCU_IDC_DEV_ID_SHIFT 0
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#define DBGMCU_IDC_REV_ID_MASK GENMASK(31, 16)
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#define DBGMCU_IDC_REV_ID_SHIFT 16
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#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
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static void security_init(void)
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@ -123,10 +129,50 @@ void enable_caches(void)
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dcache_enable();
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}
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static u32 read_idc(void)
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{
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setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
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return readl(DBGMCU_IDC);
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}
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u32 get_cpu_rev(void)
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{
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return (read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT;
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}
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u32 get_cpu_type(void)
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{
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return (read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT;
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}
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#if defined(CONFIG_DISPLAY_CPUINFO)
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int print_cpuinfo(void)
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{
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printf("CPU: STM32MP15x\n");
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char *cpu_s, *cpu_r;
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switch (get_cpu_type()) {
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case CPU_STMP32MP15x:
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cpu_s = "15x";
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break;
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default:
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cpu_s = "?";
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break;
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}
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switch (get_cpu_rev()) {
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case CPU_REVA:
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cpu_r = "A";
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break;
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case CPU_REVB:
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cpu_r = "B";
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break;
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default:
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cpu_r = "?";
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break;
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}
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printf("CPU: STM32MP%s.%s\n", cpu_s, cpu_r);
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return 0;
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}
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16
arch/arm/mach-stm32mp/include/mach/sys_proto.h
Normal file
16
arch/arm/mach-stm32mp/include/mach/sys_proto.h
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@ -0,0 +1,16 @@
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/*
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* Copyright (C) 2015-2017, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause
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*/
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#define CPU_STMP32MP15x 0x500
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/* return CPU_STMP32MPxx constants */
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u32 get_cpu_type(void);
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#define CPU_REVA 0x1000
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#define CPU_REVB 0x2000
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/* return CPU_REV constants */
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u32 get_cpu_rev(void);
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