blackfin: Fit u-boot image size into limited nor flash on blackfin.

- Disable NAND driver on bf537-stamp.
- Make MMC_SPI optional.
- Disable LCD driver on bf527-ezkit.
- Enlarge BF609 nor flash reserved size from 256k to 512k bytes.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
This commit is contained in:
Sonic Zhang
2013-02-20 18:05:16 +08:00
parent 7d861d95a3
commit 955020c6c4
3 changed files with 14 additions and 10 deletions

View File

@@ -149,10 +149,15 @@
#define CONFIG_MUSB_TIMEOUT 100000 #define CONFIG_MUSB_TIMEOUT 100000
#endif #endif
/* Don't waste time transferring a logo over the UART */
#if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART)
/*# define CONFIG_VIDEO*/
#endif
/* /*
* Video Settings * Video Settings
*/ */
#ifdef CONFIG_VIDEO
#ifdef CONFIG_BF527_EZKIT_REV_2_1 #ifdef CONFIG_BF527_EZKIT_REV_2_1
# define CONFIG_LQ035Q1_SPI_BUS 0 # define CONFIG_LQ035Q1_SPI_BUS 0
# define CONFIG_LQ035Q1_SPI_CS 7 # define CONFIG_LQ035Q1_SPI_CS 7
@@ -166,7 +171,7 @@
#else #else
# define EASYLOGO_HEADER <asm/bfin_logo_230x230_lzma.h> # define EASYLOGO_HEADER <asm/bfin_logo_230x230_lzma.h>
#endif #endif
#endif /* CONFIG_VIDEO */
/* /*
* Misc Settings * Misc Settings
@@ -175,11 +180,6 @@
#define CONFIG_RTC_BFIN #define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 1 #define CONFIG_UART_CONSOLE 1
/* Don't waste time transferring a logo over the UART */
#if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART)
# define CONFIG_VIDEO
#endif
/* /*
* Pull in common ADI header for remaining command/environment setup * Pull in common ADI header for remaining command/environment setup

View File

@@ -52,7 +52,7 @@
#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MONITOR_LEN (768 * 1024)
#define CONFIG_SYS_MALLOC_LEN (384 * 1024) #define CONFIG_SYS_MALLOC_LEN (384 * 1024)
@@ -135,15 +135,17 @@
/* /*
* SPI_MMC Settings * SPI_MMC Settings
*/ */
#define CONFIG_MMC_SPI
#ifdef CONFIG_MMC_SPI
#define CONFIG_MMC #define CONFIG_MMC
#define CONFIG_GENERIC_MMC #define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SPI #endif
/* /*
* NAND Settings * NAND Settings
*/ */
/* #define CONFIG_NAND_PLAT */ /* #define CONFIG_NAND_PLAT */
#ifdef CONFIG_NAND_PLAT
#define CONFIG_SYS_NAND_BASE 0x20212000 #define CONFIG_SYS_NAND_BASE 0x20212000
#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -158,7 +160,7 @@
#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd) #define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd) #define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
#define NAND_PLAT_GPIO_DEV_READY GPIO_PF3 #define NAND_PLAT_GPIO_DEV_READY GPIO_PF3
#endif /* CONFIG_NAND_PLAT */
/* /*
* CF-CARD IDE-HDD Support * CF-CARD IDE-HDD Support

View File

@@ -156,6 +156,8 @@
#undef CONFIG_UART_CONSOLE_IS_JTAG #undef CONFIG_UART_CONSOLE_IS_JTAG
#endif #endif
#define CONFIG_BOARD_SIZE_LIMIT $$((512 * 1024))
/* /*
* Run core 1 from L1 SRAM start address when init uboot on core 0 * Run core 1 from L1 SRAM start address when init uboot on core 0
*/ */