Merge branch 'master' of git://git.denx.de/u-boot-blackfin
This commit is contained in:
commit
93b7b7fdad
@ -18,8 +18,6 @@
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#include <asm/mach-common/bits/core.h>
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#include <asm/serial.h>
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#define BUG() while (1) asm volatile("emuexcpt;");
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#ifndef __ADSPBF60x__
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#include <asm/mach-common/bits/ebiu.h>
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#include <asm/mach-common/bits/pll.h>
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@ -147,8 +145,6 @@ static struct ddr_config ddr_config_table[] = {
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__attribute__((always_inline))
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static inline void serial_init(void)
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{
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uint32_t uart_base = UART_BASE;
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#if defined(__ADSPBF54x__) || defined(__ADSPBF60x__)
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# ifdef BFIN_BOOT_UART_USE_RTS
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# define BFIN_UART_USE_RTS 1
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@ -156,6 +152,7 @@ static inline void serial_init(void)
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# define BFIN_UART_USE_RTS 0
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# endif
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if (BFIN_UART_USE_RTS && CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) {
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uint32_t uart_base = UART_BASE;
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size_t i;
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/* force RTS rather than relying on auto RTS */
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@ -195,8 +192,8 @@ static inline void serial_init(void)
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#if CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS
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if (BFIN_DEBUG_EARLY_SERIAL) {
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serial_early_init(uart_base);
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serial_early_set_baud(uart_base, CONFIG_BAUDRATE);
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serial_early_init(UART_BASE);
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serial_early_set_baud(UART_BASE, CONFIG_BAUDRATE);
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}
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#endif
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}
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@ -547,7 +544,7 @@ maybe_self_refresh(ADI_BOOT_DATA *bs)
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__attribute__((always_inline)) static inline u16
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program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs)
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{
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u16 vr_ctl;
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u16 vr_ctl = 0;
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serial_putc('a');
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@ -731,6 +728,8 @@ update_serial_clocks(ADI_BOOT_DATA *bs, uint sdivB, uint divB, uint vcoB)
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serial_putc('a');
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if (BFIN_DEBUG_EARLY_SERIAL ||
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CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) {
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#ifdef __ADSPBF60x__
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sdivR = bfin_read_CGU_DIV();
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sdivR = ((sdivR >> 8) & 0x1f) * ((sdivR >> 5) & 0x7);
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@ -744,6 +743,8 @@ update_serial_clocks(ADI_BOOT_DATA *bs, uint sdivB, uint divB, uint vcoB)
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divisor = vcoB * sdivR;
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quotient = early_division(dividend, divisor);
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serial_early_put_div(quotient - ANOMALY_05000230);
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}
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serial_putc('c');
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}
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@ -913,7 +914,8 @@ check_hibernation(ADI_BOOT_DATA *bs, u16 vr_ctl, bool put_into_srfs)
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continue;
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serial_putc('z');
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uint32_t *hibernate_magic = bfin_read32(DPM0_RESTORE4);
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uint32_t *hibernate_magic =
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(uint32_t *)bfin_read32(DPM0_RESTORE4);
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SSYNC(); /* make sure memory controller is done */
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if (hibernate_magic[0] == 0xDEADBEEF) {
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serial_putc('c');
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@ -81,6 +81,8 @@ extern void blackfin_dcache_flush_invalidate_range(const void *, const void *);
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# define NOP_PAD_ANOMALY_05000198
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#endif
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#define BFIN_BUG() while (1) asm volatile("emuexcpt;");
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#define _bfin_readX(addr, size, asm_size, asm_ext) ({ \
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u32 __v; \
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__asm__ __volatile__( \
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@ -111,7 +113,7 @@ extern void blackfin_dcache_flush_invalidate_range(const void *, const void *);
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sizeof(*(addr)) == 1 ? bfin_read8(addr) : \
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sizeof(*(addr)) == 2 ? bfin_read16(addr) : \
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sizeof(*(addr)) == 4 ? bfin_read32(addr) : \
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({ BUG(); 0; }); \
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({ BFIN_BUG(); 0; }); \
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})
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#define bfin_write(addr, val) \
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do { \
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@ -119,7 +121,8 @@ do { \
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case 1: bfin_write8(addr, val); break; \
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case 2: bfin_write16(addr, val); break; \
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case 4: bfin_write32(addr, val); break; \
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default: BUG(); \
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default: \
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BFIN_BUG(); \
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} \
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} while (0)
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@ -19,6 +19,7 @@
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#include <net.h>
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#include <status_led.h>
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#include <version.h>
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#include <watchdog.h>
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#include <asm/cplb.h>
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#include <asm/mach-common/bits/mpu.h>
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@ -36,7 +36,10 @@ u_long get_vco(void)
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u_long get_cclk(void)
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{
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static u_long cached_cclk_pll_div, cached_cclk;
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u_long div, csel, ssel;
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u_long div, csel;
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#ifndef CGU_DIV
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u_long ssel;
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#endif
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if (pll_is_bypassed())
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return CONFIG_CLKIN_HZ;
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@ -10,6 +10,7 @@
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#include <netdev.h>
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#include <asm/blackfin.h>
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#include <asm/io.h>
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#include <asm/sdh.h>
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#include <asm/portmux.h>
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#include "soft_switch.h"
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@ -56,6 +56,7 @@
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/*
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* Flash Settings
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*/
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_BASE 0x20000000
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#define CONFIG_SYS_FLASH_CFI
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@ -63,7 +64,9 @@
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#define CONFIG_SYS_MAX_FLASH_SECT 71
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#define CONFIG_CMD_FLASH
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#define CONFIG_MONITOR_IS_IN_RAM
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/*
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#define CONFIG_SYS_NO_FLASH
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*/
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/*
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* SPI Settings
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@ -71,11 +74,12 @@
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#define CONFIG_BFIN_SPI
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#define CONFIG_ENV_SPI_MAX_HZ 30000000
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#define CONFIG_SF_DEFAULT_SPEED 30000000
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/*
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_SPI
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*/
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/*
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* Env Storage Settings
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@ -53,7 +53,7 @@
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#define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2
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#define CONFIG_EBIU_AMBCTL1_VAL 0x99b35554
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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#define CONFIG_SYS_MONITOR_LEN (384 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
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@ -90,6 +90,7 @@
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*/
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#define CONFIG_SYS_I2C_SOFT
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#ifdef CONFIG_SYS_I2C_SOFT
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#define CONFIG_SYS_I2C
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#define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
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#define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
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#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
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@ -177,6 +177,7 @@
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#define CONFIG_BAUDRATE 57600
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#define CONFIG_LOADS_ECHO 1
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#define CONFIG_UART_CONSOLE 0
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#define CONFIG_BFIN_SERIAL
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/*
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* U-Boot environment variables. Use "printenv" to examine.
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#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
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#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
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@ -145,7 +145,7 @@
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#define FLASHBOOT_ENV_SETTINGS \
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"flashboot=flread 20040000 1000000 3c0000;" \
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"bootm 0x1000000\0"
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#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024))
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/*
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* Pull in common ADI header for remaining command/environment setup
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#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
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#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
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@ -142,6 +142,7 @@
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#define FLASHBOOT_ENV_SETTINGS \
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"flashboot=flread 20040000 1000000 300000;" \
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"bootm 0x1000000\0"
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#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024))
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/*
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#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
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#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
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@ -144,6 +144,7 @@
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#define FLASHBOOT_ENV_SETTINGS \
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"flashboot=flread 20040000 1000000 300000;" \
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"bootm 0x1000000\0"
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#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024))
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/*
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