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ARM: dts: stm32: Synchronize DDR setttings on DH SoMs

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Add custom DDR DRAM settings for the DHCOR and DHCOM SoMs and put them
into use by the board file instead of the default ones. These new DRAM
settings are a better fit for the SoMs.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
This commit is contained in:
Marek Vasut
2020-04-29 15:08:38 +02:00
committed by Patrick Delaunay
parent 1ca5017418
commit 92ca0f7446
6 changed files with 372 additions and 6 deletions
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8
board/dhelectronics/dh_stm32mp1/board.c
View File

@@ -177,12 +177,16 @@ static void board_get_coding_straps(void)
int board_stm32mp1_ddr_config_name_match(struct udevice *dev,
const char *name)
{
if (ddr3code == 1 &&
!strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x1gb-533mhz"))
return 0;
if (ddr3code == 2 &&
!strcmp(name, "st,ddr3-1066-888-bin-g-1x4gb-533mhz"))
!strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x2gb-533mhz"))
return 0;
if (ddr3code == 3 &&
!strcmp(name, "st,ddr3-1066-888-bin-g-2x4gb-533mhz"))
!strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x4gb-533mhz"))
return 0;
return -EINVAL;