ipu_common: Only apply the erratum to MX51
The following erratum : "ENGcm08316 IPU: Clarification regarding the bypass mode registers setup for display and camera interfaces" only applies to mx51, so restrict its usage for this SoC only. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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@ -401,6 +401,7 @@ void ipu_reset(void)
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int ipu_probe(void)
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{
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unsigned long ipu_base;
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#if defined CONFIG_MX51
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u32 temp;
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u32 *reg_hsc_mcd = (u32 *)MIPI_HSC_BASE_ADDR;
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@ -414,6 +415,7 @@ int ipu_probe(void)
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temp = __raw_readl(reg_hsc_mxt_conf);
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__raw_writel(temp | 0x10000, reg_hsc_mxt_conf);
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#endif
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ipu_base = IPU_CTRL_BASE_ADDR;
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ipu_cpmem_base = (u32 *)(ipu_base + IPU_CPMEM_REG_BASE);
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