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Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

Browse Source 
- Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a
- lx2-watchdog support
- layerscape: pci-endpoint support, spin table relocation fixes and
  cleanups
- fsl-crypto: RNG support and bug fixes
This commit is contained in:
Tom Rini
2020-07-27 15:18:15 -04:00
parent fc3414212e 636999f21c
commit 8d1fc6fb89
181 changed files with 2317 additions and 1084 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
board/freescale/common/qixis.c
View File

@@ -323,6 +323,19 @@ static int qixis_reset_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
QIXIS_RCFG_CTL_RECONFIG_START);
#else
printf("Not implemented\n");
#endif
} else if (strcmp(argv[1], "xspi") == 0) {
#ifdef QIXIS_LBMAP_XSPI
QIXIS_WRITE(rst_ctl, 0x30);
QIXIS_WRITE(rcfg_ctl, 0);
set_lbmap(QIXIS_LBMAP_XSPI);
set_rcw_src(QIXIS_RCW_SRC_XSPI);
qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
QIXIS_RCFG_CTL_RECONFIG_IDLE);
qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
QIXIS_RCFG_CTL_RECONFIG_START);
#else
printf("Not implemented\n");
#endif
} else if (strcmp(argv[1], "watchdog") == 0) {
static char *period[9] = {"2s", "4s", "8s", "16s", "32s",

14
board/freescale/common/qixis.h
View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2011 Freescale Semiconductor
* Copyright 2020 NXP
* Author: Shengzhou Liu <Shengzhou.Liu@freescale.com>
*
* This file provides support for the QIXIS of some Freescale reference boards.
@@ -35,7 +36,12 @@ struct qixis {
u8 gdc;
u8 gdd; /* DCM Debug Data Register,0x17 */
u8 dmack;
u8 res1[6];
u8 res1;
u8 sdhc1;
u8 sdhc2;
u8 stat_pres3;
u8 los_stat;
u8 usb_ctl;
u8 watch; /* Watchdog Register,0x1F */
u8 pwr_ctl[2]; /* Power Control Register,0x20 */
u8 res2[2];
@@ -115,8 +121,8 @@ void qixis_write_i2c(unsigned int reg, u8 value);
#endif
/* Use for SDHC adapter card type identification and operation */
#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
#define QIXIS_SDID_MASK 0x07
#define QIXIS_ESDHC_ADAPTER_TYPE_EMMC45 0x1 /* eMMC Card Rev4.5 */
#define QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY 0x2 /* SD/MMC Legacy Card */
#define QIXIS_ESDHC_ADAPTER_TYPE_EMMC44 0x3 /* eMMC Card Rev4.4 */
@@ -125,12 +131,14 @@ void qixis_write_i2c(unsigned int reg, u8 value);
#define QIXIS_ESDHC_ADAPTER_TYPE_SD 0x6 /* SD Card Rev2.0 3.0 */
#define QIXIS_ESDHC_NO_ADAPTER 0x7 /* No Card is Present*/
#define QIXIS_SDHC1_S1V3 0x80 /* SDHC1: SDHC1 3.3V power control */
#define QIXIS_SDHC1_VS 0x30 /* BRDCFG11: route to SDHC1_VS */
#define QIXIS_SDCLKIN 0x08
#define QIXIS_SDCLKOUT 0x02
#define QIXIS_DAT5_6_7 0X02
#define QIXIS_DAT4 0X01
#define QIXIS_EVDD_BY_SDHC_VS 0x0c
#endif
#endif

2
board/freescale/ls1012ardb/eth.c
View File

@@ -113,7 +113,7 @@ int pfe_eth_board_init(struct udevice *dev)
/* MAC2 */
pfe_set_phy_address_mode(priv->gemac_port,
CONFIG_PFE_EMAC2_PHY_ADDR,
PHY_INTERFACE_MODE_RGMII_TXID);
PHY_INTERFACE_MODE_RGMII_ID);
}
break;
case 0x2208:

14
board/freescale/ls1043aqds/ls1043aqds.c
View File

@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2015 Freescale Semiconductor, Inc.
* Copyright 2019 NXP
* Copyright 2019-2020 NXP
*/
#include <common.h>
@@ -50,6 +50,10 @@ enum {
#define CFG_UART_MUX_SHIFT 1
#define CFG_LPUART_EN 0x1
#ifdef CONFIG_SYS_I2C_EARLY_INIT
void i2c_early_init_f(void);
#endif
#ifdef CONFIG_TFABOOT
struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
{
@@ -453,6 +457,7 @@ void board_retimer_init(void)
int board_early_init_f(void)
{
u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
#ifdef CONFIG_HAS_FSL_XHCI_USB
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
u32 usb_pwrfault;
@@ -461,10 +466,13 @@ int board_early_init_f(void)
u8 uart;
#endif
#ifdef CONFIG_SYS_I2C
/*
* Enable secure system counter for timer
*/
out_le32(cntcr, 0x1);
#ifdef CONFIG_SYS_I2C_EARLY_INIT
i2c_early_init_f();
#endif
#endif
fsl_lsch2_early_init_f();

5
board/freescale/ls1046afrwy/MAINTAINERS
View File

@@ -5,3 +5,8 @@ F: board/freescale/ls1046afrwy/
F: board/freescale/ls1046afrwy/ls1046afrwy.c
F: include/configs/ls1046afrwy.h
F: configs/ls1046afrwy_tfa_defconfig
LS1046AFRWY_SECURE_BOOT BOARD
M: Manish Tomar <manish.tomar@nxp.com>
S: Maintained
F: configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig

14
board/freescale/ls1046aqds/ls1046aqds.c
View File

@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2019 NXP
* Copyright 2019-2020 NXP
*/
#include <common.h>
@@ -35,6 +35,10 @@
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SYS_I2C_EARLY_INIT
void i2c_early_init_f(void);
#endif
#ifdef CONFIG_TFABOOT
struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
{
@@ -323,6 +327,7 @@ int i2c_multiplexer_select_vid_channel(u8 channel)
int board_early_init_f(void)
{
u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
#ifdef CONFIG_HAS_FSL_XHCI_USB
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
u32 usb_pwrfault;
@@ -331,10 +336,13 @@ int board_early_init_f(void)
u8 uart;
#endif
#ifdef CONFIG_SYS_I2C
/*
* Enable secure system counter for timer
*/
out_le32(cntcr, 0x1);
#ifdef CONFIG_SYS_I2C_EARLY_INIT
i2c_early_init_f();
#endif
#endif
fsl_lsch2_early_init_f();

36
board/freescale/lx2160a/lx2160a.c
View File

@@ -18,6 +18,7 @@
#include <fdt_support.h>
#include <linux/bitops.h>
#include <linux/libfdt.h>
#include <linux/delay.h>
#include <fsl-mc/fsl_mc.h>
#include <env_internal.h>
#include <efi_loader.h>
@@ -379,7 +380,7 @@ int checkboard(void)
*/
u8 qixis_esdhc_detect_quirk(void)
{
/* for LX2160AQDS res1[1] @ offset 0x1A is SDHC1 Control/Status (SDHC1)
/*
* SDHC1 Card ID:
* Specifies the type of card installed in the SDHC1 adapter slot.
* 000= (reserved)
@@ -391,10 +392,35 @@ u8 qixis_esdhc_detect_quirk(void)
* 110= SDCard V2/V3 adapter installed.
* 111= no adapter is installed.
*/
return ((QIXIS_READ(res1[1]) & QIXIS_SDID_MASK) !=
return ((QIXIS_READ(sdhc1) & QIXIS_SDID_MASK) !=
QIXIS_ESDHC_NO_ADAPTER);
}
static void esdhc_adapter_card_ident(void)
{
u8 card_id, val;
val = QIXIS_READ(sdhc1);
card_id = val & QIXIS_SDID_MASK;
switch (card_id) {
case QIXIS_ESDHC_ADAPTER_TYPE_SD:
/* Power cycle to card */
val &= ~QIXIS_SDHC1_S1V3;
QIXIS_WRITE(sdhc1, val);
mdelay(1);
val |= QIXIS_SDHC1_S1V3;
QIXIS_WRITE(sdhc1, val);
/* Route to SDHC1_VS */
val = QIXIS_READ(brdcfg[11]);
val |= QIXIS_SDHC1_VS;
QIXIS_WRITE(brdcfg[11], val);
break;
default:
break;
}
}
int config_board_mux(void)
{
u8 reg11, reg5, reg13;
@@ -501,6 +527,12 @@ int config_board_mux(void)
return 0;
}
int board_early_init_r(void)
{
esdhc_adapter_card_ident();
return 0;
}
#elif defined(CONFIG_TARGET_LX2160ARDB)
int config_board_mux(void)
{

29
board/freescale/t208xqds/t208xqds.c
View File

@@ -345,6 +345,33 @@ int brd_mux_lane_to_slot(void)
return 0;
}
static void esdhc_adapter_card_ident(void)
{
u8 card_id, value;
card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
switch (card_id) {
case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
value = QIXIS_READ(brdcfg[5]);
value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);
QIXIS_WRITE(brdcfg[5], value);
break;
case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
value = QIXIS_READ(pwr_ctl[1]);
value |= QIXIS_EVDD_BY_SDHC_VS;
QIXIS_WRITE(pwr_ctl[1], value);
break;
case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
value = QIXIS_READ(brdcfg[5]);
value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);
QIXIS_WRITE(brdcfg[5], value);
break;
default:
break;
}
}
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
@@ -384,7 +411,7 @@ int board_early_init_r(void)
brd_mux_lane_to_slot();
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
esdhc_adapter_card_ident();
return 0;
}