Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Misc gen5 fixes
This commit is contained in:
@@ -902,7 +902,7 @@ config ARCH_SOCFPGA
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select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
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select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
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select SYSRESET
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select SYSRESET
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select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
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select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
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select SYSRESET_SOCFPGA_STRATIX10 if TARGET_SOCFPGA_STRATIX10
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select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
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imply CMD_DM
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imply CMD_DM
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imply CMD_MTDPARTS
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imply CMD_MTDPARTS
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imply CRC32_VERIFY
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imply CRC32_VERIFY
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@@ -79,8 +79,6 @@ void board_init_f(ulong dummy)
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writel(SYSMGR_ECC_OCRAM_DERR | SYSMGR_ECC_OCRAM_EN,
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writel(SYSMGR_ECC_OCRAM_DERR | SYSMGR_ECC_OCRAM_EN,
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&sysmgr_regs->eccgrp_ocram);
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&sysmgr_regs->eccgrp_ocram);
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memset(__bss_start, 0, __bss_end - __bss_start);
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socfpga_sdram_remap_zero();
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socfpga_sdram_remap_zero();
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socfpga_pl310_clear();
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socfpga_pl310_clear();
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@@ -203,7 +203,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
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/* SPL SDMMC boot support */
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/* SPL SDMMC boot support */
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#ifdef CONFIG_SPL_MMC_SUPPORT
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#ifdef CONFIG_SPL_MMC_SUPPORT
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#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
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#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
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#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
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#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#endif
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#endif
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#else
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#else
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