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spi: fsl_dspi: rename num-cs to spi-num-chipselects

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The official devicetree bindings specifies spi-num-chipselects as the
name. Use it.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Michael Walle 2021-10-13 18:14:18 +02:00 committed by Priyanka Jain
parent 765afe7fb3
commit 8c58089287
10 changed files with 20 additions and 19 deletions
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2
arch/arm/dts/fsl-ls1012a.dtsi
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@ -49,7 +49,7 @@
interrupts = <0 64 0x4>; interrupts = <0 64 0x4>;
clock-names = "dspi"; clock-names = "dspi";
clocks = <&clockgen 4 0>; clocks = <&clockgen 4 0>;
num-cs = <6>; spi-num-chipselects = <6>;
big-endian; big-endian;
status = "disabled"; status = "disabled";
}; };

6
arch/arm/dts/fsl-ls1028a.dtsi
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@ -165,7 +165,7 @@
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "dspi"; clock-names = "dspi";
clocks = <&clockgen 4 0>; clocks = <&clockgen 4 0>;
num-cs = <5>; spi-num-chipselects = <5>;
litte-endian; litte-endian;
status = "disabled"; status = "disabled";
}; };
@ -178,7 +178,7 @@
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "dspi"; clock-names = "dspi";
clocks = <&clockgen 4 0>; clocks = <&clockgen 4 0>;
num-cs = <5>; spi-num-chipselects = <5>;
little-endian; little-endian;
status = "disabled"; status = "disabled";
}; };
@ -191,7 +191,7 @@
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "dspi"; clock-names = "dspi";
clocks = <&clockgen 4 0>; clocks = <&clockgen 4 0>;
num-cs = <5>; spi-num-chipselects = <5>;
little-endian; little-endian;
status = "disabled"; status = "disabled";
}; };

4
arch/arm/dts/fsl-ls1043a.dtsi
View File

@ -53,7 +53,7 @@
interrupts = <0 64 0x4>; interrupts = <0 64 0x4>;
clock-names = "dspi"; clock-names = "dspi";
clocks = <&clockgen 4 0>; clocks = <&clockgen 4 0>;
num-cs = <6>; spi-num-chipselects = <6>;
big-endian; big-endian;
status = "disabled"; status = "disabled";
}; };
@ -66,7 +66,7 @@
interrupts = <0 65 0x4>; interrupts = <0 65 0x4>;
clock-names = "dspi"; clock-names = "dspi";
clocks = <&clockgen 4 0>; clocks = <&clockgen 4 0>;
num-cs = <6>; spi-num-chipselects = <6>;
big-endian; big-endian;
status = "disabled"; status = "disabled";
}; };

4
arch/arm/dts/fsl-ls1046a.dtsi
View File

@ -52,7 +52,7 @@
interrupts = <0 64 0x4>; interrupts = <0 64 0x4>;
clock-names = "dspi"; clock-names = "dspi";
clocks = <&clockgen 4 0>; clocks = <&clockgen 4 0>;
num-cs = <6>; spi-num-chipselects = <6>;
big-endian; big-endian;
status = "disabled"; status = "disabled";
}; };
@ -65,7 +65,7 @@
interrupts = <0 65 0x4>; interrupts = <0 65 0x4>;
clock-names = "dspi"; clock-names = "dspi";
clocks = <&clockgen 4 0>; clocks = <&clockgen 4 0>;
num-cs = <6>; spi-num-chipselects = <6>;
big-endian; big-endian;
status = "disabled"; status = "disabled";
}; };

2
arch/arm/dts/fsl-ls1088a.dtsi
View File

@ -89,7 +89,7 @@
#size-cells = <0>; #size-cells = <0>;
reg = <0x0 0x2100000 0x0 0x10000>; reg = <0x0 0x2100000 0x0 0x10000>;
interrupts = <0 26 0x4>; /* Level high type */ interrupts = <0 26 0x4>; /* Level high type */
num-cs = <6>; spi-num-chipselects = <6>;
}; };
qspi: quadspi@1550000 { qspi: quadspi@1550000 {

2
arch/arm/dts/fsl-ls2080a.dtsi
View File

@ -93,7 +93,7 @@
#size-cells = <0>; #size-cells = <0>;
reg = <0x0 0x2100000 0x0 0x10000>; reg = <0x0 0x2100000 0x0 0x10000>;
interrupts = <0 26 0x4>; /* Level high type */ interrupts = <0 26 0x4>; /* Level high type */
num-cs = <6>; spi-num-chipselects = <6>;
}; };
qspi: quadspi@1550000 { qspi: quadspi@1550000 {

6
arch/arm/dts/fsl-lx2160a.dtsi
View File

@ -172,7 +172,7 @@
#size-cells = <0>; #size-cells = <0>;
reg = <0x0 0x2100000 0x0 0x10000>; reg = <0x0 0x2100000 0x0 0x10000>;
interrupts = <0 26 0x4>; /* Level high type */ interrupts = <0 26 0x4>; /* Level high type */
num-cs = <6>; spi-num-chipselects = <6>;
}; };
dspi1: dspi@2110000 { dspi1: dspi@2110000 {
@ -181,7 +181,7 @@
#size-cells = <0>; #size-cells = <0>;
reg = <0x0 0x2110000 0x0 0x10000>; reg = <0x0 0x2110000 0x0 0x10000>;
interrupts = <0 26 0x4>; /* Level high type */ interrupts = <0 26 0x4>; /* Level high type */
num-cs = <6>; spi-num-chipselects = <6>;
}; };
dspi2: dspi@2120000 { dspi2: dspi@2120000 {
@ -190,7 +190,7 @@
#size-cells = <0>; #size-cells = <0>;
reg = <0x0 0x2120000 0x0 0x10000>; reg = <0x0 0x2120000 0x0 0x10000>;
interrupts = <0 241 0x4>; /* Level high type */ interrupts = <0 241 0x4>; /* Level high type */
num-cs = <6>; spi-num-chipselects = <6>;
}; };
gpio0: gpio@2300000 { gpio0: gpio@2300000 {

4
arch/arm/dts/ls1021a.dtsi
View File

@ -190,7 +190,7 @@
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "dspi"; clock-names = "dspi";
clocks = <&platform_clk 1>; clocks = <&platform_clk 1>;
num-cs = <6>; spi-num-chipselects = <6>;
big-endian; big-endian;
status = "disabled"; status = "disabled";
}; };
@ -203,7 +203,7 @@
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "dspi"; clock-names = "dspi";
clocks = <&platform_clk 1>; clocks = <&platform_clk 1>;
num-cs = <6>; spi-num-chipselects = <6>;
big-endian; big-endian;
status = "disabled"; status = "disabled";
}; };

4
arch/arm/dts/vf.dtsi
View File

@ -70,7 +70,7 @@
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,vf610-dspi"; compatible = "fsl,vf610-dspi";
reg = <0x4002c000 0x1000>; reg = <0x4002c000 0x1000>;
num-cs = <5>; spi-num-chipselects = <5>;
status = "disabled"; status = "disabled";
}; };
@ -79,7 +79,7 @@
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,vf610-dspi"; compatible = "fsl,vf610-dspi";
reg = <0x4002d000 0x1000>; reg = <0x4002d000 0x1000>;
num-cs = <5>; spi-num-chipselects = <5>;
status = "disabled"; status = "disabled";
}; };

5
drivers/spi/fsl_dspi.c
View File

@ -586,8 +586,9 @@ static int fsl_dspi_of_to_plat(struct udevice *bus)
if (fdtdec_get_bool(blob, node, "big-endian")) if (fdtdec_get_bool(blob, node, "big-endian"))
plat->flags |= DSPI_FLAG_REGMAP_ENDIAN_BIG; plat->flags |= DSPI_FLAG_REGMAP_ENDIAN_BIG;
plat->num_chipselect = plat->num_chipselect = fdtdec_get_int(blob, node,
fdtdec_get_int(blob, node, "num-cs", FSL_DSPI_MAX_CHIPSELECT); "spi-num-chipselects",
FSL_DSPI_MAX_CHIPSELECT);
addr = dev_read_addr(bus); addr = dev_read_addr(bus);
if (addr == FDT_ADDR_T_NONE) { if (addr == FDT_ADDR_T_NONE) {