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Convert CONFIG_PHYLIB et al to Kconfig

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This converts the following to Kconfig:
   CONFIG_PHYLIB
   CONFIG_PHY_ATHEROS
   CONFIG_PHY_GIGE
   CONFIG_MII

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2021-11-07 22:59:42 -05:00
parent 406257ae41
commit 8bd39de9b1
37 changed files with 32 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
configs/brppt2_defconfig
View File

@ -85,6 +85,7 @@ CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_FIXED=y CONFIG_PHY_FIXED=y
CONFIG_FEC_MXC=y CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_GPIO=y

2
configs/imx8mq_evk_defconfig
View File

@ -56,7 +56,9 @@ CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_FEC_MXC=y CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PHY=y CONFIG_PHY=y
CONFIG_PHY_IMX8MQ_USB=y CONFIG_PHY_IMX8MQ_USB=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y

3
configs/imx8mq_phanbell_defconfig
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@ -58,8 +58,11 @@ CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_FEC_MXC=y CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y CONFIG_PINCTRL_IMX8M=y
CONFIG_SPL_POWER_LEGACY=y CONFIG_SPL_POWER_LEGACY=y

1
configs/ls1088aqds_defconfig
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@ -66,6 +66,7 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y CONFIG_PHY_VITESSE=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_NVME=y CONFIG_NVME=y

1
configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
View File

@ -62,6 +62,7 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y CONFIG_PHY_VITESSE=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_NVME=y CONFIG_NVME=y

1
configs/ls1088aqds_qspi_defconfig
View File

@ -65,6 +65,7 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y CONFIG_PHY_VITESSE=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_NVME=y CONFIG_NVME=y

1
configs/ls1088aqds_sdcard_ifc_defconfig
View File

@ -76,6 +76,7 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y CONFIG_PHY_VITESSE=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_NVME=y CONFIG_NVME=y

1
configs/ls1088aqds_sdcard_qspi_defconfig
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@ -75,6 +75,7 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y CONFIG_PHY_VITESSE=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_NVME=y CONFIG_NVME=y

1
configs/ls1088aqds_tfa_defconfig
View File

@ -85,6 +85,7 @@ CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y CONFIG_DM_MDIO_MUX=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y CONFIG_MDIO_MUX_I2CREG=y

1
configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
View File

@ -65,6 +65,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_VITESSE=y CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y

1
configs/ls1088ardb_qspi_defconfig
View File

@ -68,6 +68,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_VITESSE=y CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y

1
configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
View File

@ -78,6 +78,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_VITESSE=y CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y

1
configs/ls1088ardb_sdcard_qspi_defconfig
View File

@ -78,6 +78,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_VITESSE=y CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y

1
configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
View File

@ -66,6 +66,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_VITESSE=y CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y

1
configs/ls1088ardb_tfa_defconfig
View File

@ -72,6 +72,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_VITESSE=y CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y

1
configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
View File

@ -71,6 +71,7 @@ CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y CONFIG_NVME=y

1
configs/lx2160aqds_tfa_defconfig
View File

@ -78,6 +78,7 @@ CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y CONFIG_NVME=y

1
configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
View File

@ -64,6 +64,7 @@ CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y CONFIG_NVME=y
CONFIG_PCI=y CONFIG_PCI=y

1
configs/lx2160ardb_tfa_defconfig
View File

@ -73,6 +73,7 @@ CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y CONFIG_NVME=y
CONFIG_PCI=y CONFIG_PCI=y

1
configs/lx2160ardb_tfa_stmm_defconfig
View File

@ -73,6 +73,7 @@ CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y CONFIG_NVME=y
CONFIG_PCI=y CONFIG_PCI=y

1
configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
View File

@ -75,6 +75,7 @@ CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y
CONFIG_PCI=y CONFIG_PCI=y

1
configs/lx2162aqds_tfa_defconfig
View File

@ -83,6 +83,7 @@ CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y
CONFIG_PCI=y CONFIG_PCI=y

1
configs/lx2162aqds_tfa_verified_boot_defconfig
View File

@ -84,6 +84,7 @@ CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y CONFIG_E1000=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y CONFIG_FSL_LS_MDIO=y
CONFIG_PCI=y CONFIG_PCI=y

1
configs/m53menlo_defconfig
View File

@ -91,6 +91,7 @@ CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y CONFIG_DM_MDIO=y
CONFIG_DM_ETH_PHY=y CONFIG_DM_ETH_PHY=y
CONFIG_FEC_MXC=y CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX5=y CONFIG_PINCTRL_IMX5=y
CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR=y

1
configs/pico-imx6_defconfig
View File

@ -71,6 +71,7 @@ CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y CONFIG_FEC_MXC=y
CONFIG_RGMII=y CONFIG_RGMII=y
CONFIG_MII=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y CONFIG_PINCTRL_IMX6=y
CONFIG_MXC_UART=y CONFIG_MXC_UART=y

4
configs/pico-imx8mq_defconfig
View File

@ -57,8 +57,12 @@ CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_FEC_MXC=y CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y CONFIG_PINCTRL_IMX8M=y
CONFIG_SPL_POWER_LEGACY=y CONFIG_SPL_POWER_LEGACY=y

1
include/configs/brppt2.h
View File

@ -88,7 +88,6 @@ BUR_COMMON_ENV \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Ethernet */ /* Ethernet */
#define CONFIG_MII
#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_FIXED_SPEED _1000BASET #define CONFIG_FEC_FIXED_SPEED _1000BASET
#define CONFIG_ARP_TIMEOUT 1500UL #define CONFIG_ARP_TIMEOUT 1500UL

2
include/configs/imx8mq_evk.h
View File

@ -42,14 +42,12 @@
/* ENET Config */ /* ENET Config */
/* ENET1 */ /* ENET1 */
#if defined(CONFIG_CMD_NET) #if defined(CONFIG_CMD_NET)
#define CONFIG_MII
#define CONFIG_ETHPRIME "FEC" #define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC #define FEC_QUIRK_ENET_MAC
#define CONFIG_PHY_GIGE
#define IMX_FEC_BASE 0x30BE0000 #define IMX_FEC_BASE 0x30BE0000
#endif #endif

4
include/configs/imx8mq_phanbell.h
View File

@ -36,17 +36,13 @@
/* ENET Config */ /* ENET Config */
/* ENET1 */ /* ENET1 */
#if defined(CONFIG_CMD_NET) #if defined(CONFIG_CMD_NET)
#define CONFIG_MII
#define CONFIG_ETHPRIME "FEC" #define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC #define FEC_QUIRK_ENET_MAC
#define CONFIG_PHY_GIGE
#define IMX_FEC_BASE 0x30BE0000 #define IMX_FEC_BASE 0x30BE0000
#define CONFIG_PHYLIB
#endif #endif
#define CONFIG_MFG_ENV_SETTINGS \ #define CONFIG_MFG_ENV_SETTINGS \

1
include/configs/ls1088aqds.h
View File

@ -535,7 +535,6 @@ unsigned long get_board_sys_clk(void);
#define XQSGMII_CARD_PHY4_PORT3_ADDR 0xf #define XQSGMII_CARD_PHY4_PORT3_ADDR 0xf
#define CONFIG_ETHPRIME "DPMAC1@xgmii" #define CONFIG_ETHPRIME "DPMAC1@xgmii"
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif #endif

1
include/configs/ls1088ardb.h
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@ -484,7 +484,6 @@
#define QSGMII2_PORT4_PHY_ADDR 0x1f #define QSGMII2_PORT4_PHY_ADDR 0x1f
#define CONFIG_ETHPRIME "DPMAC1@xgmii" #define CONFIG_ETHPRIME "DPMAC1@xgmii"
#define CONFIG_PHY_GIGE
#endif #endif
#endif #endif

1
include/configs/lx2160aqds.h
View File

@ -29,7 +29,6 @@ u8 qixis_esdhc_detect_quirk(void);
/* MAC/PHY configuration */ /* MAC/PHY configuration */
#if defined(CONFIG_FSL_MC_ENET) #if defined(CONFIG_FSL_MC_ENET)
#define CONFIG_MII
#define CONFIG_ETHPRIME "DPMAC17@rgmii-id" #define CONFIG_ETHPRIME "DPMAC17@rgmii-id"
#endif #endif

1
include/configs/lx2160ardb.h
View File

@ -19,7 +19,6 @@
/* MAC/PHY configuration */ /* MAC/PHY configuration */
#if defined(CONFIG_FSL_MC_ENET) #if defined(CONFIG_FSL_MC_ENET)
#define CONFIG_MII
#define CONFIG_ETHPRIME "DPMAC1@xgmii" #define CONFIG_ETHPRIME "DPMAC1@xgmii"
#endif #endif

1
include/configs/lx2162aqds.h
View File

@ -33,7 +33,6 @@ u8 qixis_esdhc_detect_quirk(void);
/* MAC/PHY configuration */ /* MAC/PHY configuration */
#if defined(CONFIG_FSL_MC_ENET) #if defined(CONFIG_FSL_MC_ENET)
#define CONFIG_MII
#define CONFIG_ETHPRIME "DPMAC17@rgmii-id" #define CONFIG_ETHPRIME "DPMAC17@rgmii-id"
#endif #endif

1
include/configs/m53menlo.h
View File

@ -75,7 +75,6 @@
#ifdef CONFIG_CMD_NET #ifdef CONFIG_CMD_NET
#define IMX_FEC_BASE FEC_BASE_ADDR #define IMX_FEC_BASE FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0 #define CONFIG_FEC_MXC_PHYADDR 0x0
#define CONFIG_MII
#define CONFIG_DISCOVER_PHY #define CONFIG_DISCOVER_PHY
#define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_ETHPRIME "FEC0" #define CONFIG_ETHPRIME "FEC0"

1
include/configs/pico-imx6.h
View File

@ -130,7 +130,6 @@
#define CONFIG_BOARD_SIZE_LIMIT 715776 #define CONFIG_BOARD_SIZE_LIMIT 715776
/* Ethernet Configuration */ /* Ethernet Configuration */
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR #define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC" #define CONFIG_ETHPRIME "FEC"

5
include/configs/pico-imx8mq.h
View File

@ -36,18 +36,13 @@
/* ENET Config */ /* ENET Config */
/* ENET1 */ /* ENET1 */
#if defined(CONFIG_CMD_NET) #if defined(CONFIG_CMD_NET)
#define CONFIG_MII
#define CONFIG_ETHPRIME "FEC" #define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 1 #define CONFIG_FEC_MXC_PHYADDR 1
#define FEC_QUIRK_ENET_MAC #define FEC_QUIRK_ENET_MAC
#define CONFIG_PHY_GIGE
#define IMX_FEC_BASE 0x30BE0000 #define IMX_FEC_BASE 0x30BE0000
#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#endif #endif
/* Initial environment variables */ /* Initial environment variables */