Convert CONFIG_PHYLIB et al to Kconfig

This converts the following to Kconfig:
   CONFIG_PHYLIB
   CONFIG_PHY_ATHEROS
   CONFIG_PHY_GIGE
   CONFIG_MII

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2021-11-07 22:59:42 -05:00
parent 406257ae41
commit 8bd39de9b1
37 changed files with 32 additions and 19 deletions

View File

@ -85,6 +85,7 @@ CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHYLIB=y
CONFIG_PHY_FIXED=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y

View File

@ -56,7 +56,9 @@ CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PHY=y
CONFIG_PHY_IMX8MQ_USB=y
CONFIG_PINCTRL=y

View File

@ -58,8 +58,11 @@ CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
CONFIG_SPL_POWER_LEGACY=y

View File

@ -66,6 +66,7 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y

View File

@ -62,6 +62,7 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y

View File

@ -65,6 +65,7 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y

View File

@ -76,6 +76,7 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y

View File

@ -75,6 +75,7 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y

View File

@ -85,6 +85,7 @@ CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y

View File

@ -65,6 +65,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y

View File

@ -68,6 +68,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y

View File

@ -78,6 +78,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y

View File

@ -78,6 +78,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y

View File

@ -66,6 +66,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y

View File

@ -72,6 +72,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y

View File

@ -71,6 +71,7 @@ CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y

View File

@ -78,6 +78,7 @@ CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y

View File

@ -64,6 +64,7 @@ CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y
CONFIG_PCI=y

View File

@ -73,6 +73,7 @@ CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y
CONFIG_PCI=y

View File

@ -73,6 +73,7 @@ CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y
CONFIG_PCI=y

View File

@ -75,6 +75,7 @@ CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
CONFIG_PCI=y

View File

@ -83,6 +83,7 @@ CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
CONFIG_PCI=y

View File

@ -84,6 +84,7 @@ CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
CONFIG_PCI=y

View File

@ -91,6 +91,7 @@ CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_DM_ETH_PHY=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX5=y
CONFIG_DM_REGULATOR=y

View File

@ -71,6 +71,7 @@ CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y
CONFIG_RGMII=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_MXC_UART=y

View File

@ -57,8 +57,12 @@ CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
CONFIG_SPL_POWER_LEGACY=y

View File

@ -88,7 +88,6 @@ BUR_COMMON_ENV \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Ethernet */
#define CONFIG_MII
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_FIXED_SPEED _1000BASET
#define CONFIG_ARP_TIMEOUT 1500UL

View File

@ -42,14 +42,12 @@
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
#define CONFIG_MII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#define CONFIG_PHY_GIGE
#define IMX_FEC_BASE 0x30BE0000
#endif

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@ -36,17 +36,13 @@
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
#define CONFIG_MII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#define CONFIG_PHY_GIGE
#define IMX_FEC_BASE 0x30BE0000
#define CONFIG_PHYLIB
#endif
#define CONFIG_MFG_ENV_SETTINGS \

View File

@ -535,7 +535,6 @@ unsigned long get_board_sys_clk(void);
#define XQSGMII_CARD_PHY4_PORT3_ADDR 0xf
#define CONFIG_ETHPRIME "DPMAC1@xgmii"
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif

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@ -484,7 +484,6 @@
#define QSGMII2_PORT4_PHY_ADDR 0x1f
#define CONFIG_ETHPRIME "DPMAC1@xgmii"
#define CONFIG_PHY_GIGE
#endif
#endif

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@ -29,7 +29,6 @@ u8 qixis_esdhc_detect_quirk(void);
/* MAC/PHY configuration */
#if defined(CONFIG_FSL_MC_ENET)
#define CONFIG_MII
#define CONFIG_ETHPRIME "DPMAC17@rgmii-id"
#endif

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@ -19,7 +19,6 @@
/* MAC/PHY configuration */
#if defined(CONFIG_FSL_MC_ENET)
#define CONFIG_MII
#define CONFIG_ETHPRIME "DPMAC1@xgmii"
#endif

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@ -33,7 +33,6 @@ u8 qixis_esdhc_detect_quirk(void);
/* MAC/PHY configuration */
#if defined(CONFIG_FSL_MC_ENET)
#define CONFIG_MII
#define CONFIG_ETHPRIME "DPMAC17@rgmii-id"
#endif

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@ -75,7 +75,6 @@
#ifdef CONFIG_CMD_NET
#define IMX_FEC_BASE FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
#define CONFIG_MII
#define CONFIG_DISCOVER_PHY
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_ETHPRIME "FEC0"

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@ -130,7 +130,6 @@
#define CONFIG_BOARD_SIZE_LIMIT 715776
/* Ethernet Configuration */
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"

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@ -36,18 +36,13 @@
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
#define CONFIG_MII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 1
#define FEC_QUIRK_ENET_MAC
#define CONFIG_PHY_GIGE
#define IMX_FEC_BASE 0x30BE0000
#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#endif
/* Initial environment variables */