83xx: Add Vitesse VSC7385 firmware uploading
Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload the Vitesse VSC7385 firmware. Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET. Cleaned up the board header files to make selecting the VSC7385 easier to control. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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@@ -28,6 +28,7 @@
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#endif
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#include <pci.h>
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#include <mpc83xx.h>
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#include <vsc7385.h>
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DECLARE_GLOBAL_DATA_PTR;
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@@ -98,6 +99,26 @@ void pci_init_board(void)
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mpc83xx_pci_init(1, reg, warmboot);
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}
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/*
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* Miscellaneous late-boot configurations
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*
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* If a VSC7385 microcode image is present, then upload it.
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*/
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int misc_init_r(void)
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{
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int rc = 0;
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#ifdef CONFIG_VSC7385_IMAGE
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if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE,
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CONFIG_VSC7385_IMAGE_SIZE)) {
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puts("Failure uploading VSC7385 microcode.\n");
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rc = 1;
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}
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#endif
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return rc;
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}
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#if defined(CONFIG_OF_BOARD_SETUP)
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void ft_board_setup(void *blob, bd_t *bd)
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{
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@@ -25,6 +25,7 @@
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#include <mpc83xx.h>
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#include <i2c.h>
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#include <miiphy.h>
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#include <vsc7385.h>
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#ifdef CONFIG_PCI
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#include <asm/mpc8349_pci.h>
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#include <pci.h>
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@@ -177,7 +178,7 @@ int checkboard(void)
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*/
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int misc_init_f(void)
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{
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#ifdef CONFIG_VSC7385
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#ifdef CONFIG_VSC7385_ENET
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volatile u32 *vsc7385_cpuctrl;
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/* 0x1c0c0 is the VSC7385 CPU Control (CPUCTRL) Register. The power up
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@@ -239,6 +240,8 @@ int misc_init_f(void)
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}
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/*
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* Miscellaneous late-boot configurations
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*
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* Make sure the EEPROM has the HRCW correctly programmed.
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* Make sure the RTC is correctly programmed.
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*
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@@ -250,6 +253,8 @@ int misc_init_f(void)
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*
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* This function makes sure that the I2C EEPROM is programmed
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* correctly.
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*
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* If a VSC7385 microcode image is present, then upload it.
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*/
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int misc_init_r(void)
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{
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@@ -375,6 +380,14 @@ int misc_init_r(void)
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i2c_set_bus_num(orig_bus);
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#endif
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#ifdef CONFIG_VSC7385_IMAGE
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if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE,
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CONFIG_VSC7385_IMAGE_SIZE)) {
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puts("Failure uploading VSC7385 microcode.\n");
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rc = 1;
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}
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#endif
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return rc;
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}
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@@ -16,6 +16,8 @@
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#include <i2c.h>
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#include <asm/io.h>
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#include <spd_sdram.h>
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#include <vsc7385.h>
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#if defined(CFG_DRAM_TEST)
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int
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@@ -56,11 +58,6 @@ testdram(void)
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}
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#endif
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int board_early_init_f(void)
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{
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return 0;
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}
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#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
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void ddr_enable_ecc(unsigned int dram_size);
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#endif
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@@ -135,6 +132,26 @@ int checkboard(void)
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return 0;
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}
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/*
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* Miscellaneous late-boot configurations
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*
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* If a VSC7385 microcode image is present, then upload it.
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*/
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int misc_init_r(void)
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{
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int rc = 0;
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#ifdef CONFIG_VSC7385_IMAGE
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if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE,
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CONFIG_VSC7385_IMAGE_SIZE)) {
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puts("Failure uploading VSC7385 microcode.\n");
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rc = 1;
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}
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#endif
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return rc;
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}
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#if defined(CONFIG_OF_BOARD_SETUP)
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void ft_board_setup(void *blob, bd_t *bd)
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