Convert CONFIG_OMAP_EHCI_PHY1_RESET_GPIO et al to Kconfig
This converts the following to Kconfig: CONFIG_OMAP_EHCI_PHY1_RESET_GPIO CONFIG_OMAP_EHCI_PHY2_RESET_GPIO CONFIG_OMAP_EHCI_PHY3_RESET_GPIO To do this, we also introduce CONFIG_HAS_CONFIG_OMAP_EHCI_PHYn_RESET_GPIO options to get setting the GPIO number. Signed-off-by: Tom Rini <trini@konsulko.com>
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@ -77,6 +77,8 @@ CONFIG_DM_SPI=y
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CONFIG_OMAP3_SPI=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y
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CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=57
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CONFIG_USB_MUSB_HOST=y
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CONFIG_USB_MUSB_AM35X=y
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CONFIG_BCH=y
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@ -82,6 +82,8 @@ CONFIG_OMAP3_SPI=y
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CONFIG_USB=y
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# CONFIG_SPL_DM_USB is not set
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CONFIG_USB_EHCI_HCD=y
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CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y
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CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=4
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CONFIG_USB_MUSB_HOST=y
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CONFIG_USB_MUSB_OMAP2PLUS=y
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CONFIG_TWL4030_USB=y
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@ -84,6 +84,8 @@ CONFIG_OMAP3_SPI=y
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CONFIG_USB=y
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# CONFIG_SPL_DM_USB is not set
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CONFIG_USB_EHCI_HCD=y
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CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y
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CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=147
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CONFIG_USB_OMAP3=y
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CONFIG_USB_MUSB_GADGET=y
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CONFIG_USB_MUSB_OMAP2PLUS=y
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@ -83,6 +83,8 @@ CONFIG_OMAP3_SPI=y
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CONFIG_USB=y
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# CONFIG_SPL_DM_USB is not set
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CONFIG_USB_EHCI_HCD=y
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CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y
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CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=4
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CONFIG_USB_MUSB_HOST=y
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CONFIG_USB_MUSB_OMAP2PLUS=y
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CONFIG_TWL4030_USB=y
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@ -40,6 +40,10 @@ CONFIG_CONS_INDEX=3
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CONFIG_SYS_NS16550=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_HAS_OMAP_EHCI_PHY1_RESET_GPIO=y
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CONFIG_OMAP_EHCI_PHY1_RESET_GPIO=1
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CONFIG_HAS_OMAP_EHCI_PHY2_RESET_GPIO=y
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CONFIG_OMAP_EHCI_PHY2_RESET_GPIO=62
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CONFIG_USB_OMAP3=y
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CONFIG_USB_HOST_ETHER=y
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CONFIG_USB_ETHER_SMSC95XX=y
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@ -49,6 +49,10 @@ CONFIG_CONS_INDEX=3
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CONFIG_SYS_NS16550=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_HAS_OMAP_EHCI_PHY2_RESET_GPIO=y
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CONFIG_OMAP_EHCI_PHY2_RESET_GPIO=80
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CONFIG_HAS_OMAP_EHCI_PHY3_RESET_GPIO=y
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CONFIG_OMAP_EHCI_PHY3_RESET_GPIO=79
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CONFIG_USB_DWC3=y
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CONFIG_USB_DWC3_OMAP=y
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CONFIG_USB_DWC3_PHY_OMAP=y
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@ -183,6 +183,40 @@ config USB_EHCI_OMAP
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Enables support for the on-chip EHCI controller on OMAP3 and later
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SoCs.
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if USB_EHCI_OMAP
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config HAS_OMAP_EHCI_PHY1_RESET_GPIO
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bool "PHY #1 requires a GPIO hold to it in RESET while PHY settles"
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help
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Enable this to be able to configure the GPIO number used to hold the
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PHY in RESET for enough time until the PHY is settled and ready.
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config OMAP_EHCI_PHY1_RESET_GPIO
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int "GPIO number to hold PHY #1 in RESET"
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depends on HAS_OMAP_EHCI_PHY1_RESET_GPIO
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config HAS_OMAP_EHCI_PHY2_RESET_GPIO
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bool "PHY #2 requires a GPIO hold to it in RESET while PHY settles"
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help
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Enable this to be able to configure the GPIO number used to hold the
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PHY in RESET for enough time until the PHY is settled and ready.
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config OMAP_EHCI_PHY2_RESET_GPIO
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int "GPIO number to hold PHY #2 in RESET"
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depends on HAS_OMAP_EHCI_PHY2_RESET_GPIO
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config HAS_OMAP_EHCI_PHY3_RESET_GPIO
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bool "PHY #3 requires a GPIO hold to it in RESET while PHY settles"
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help
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Enable this to be able to configure the GPIO number used to hold the
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PHY in RESET for enough time until the PHY is settled and ready.
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config OMAP_EHCI_PHY3_RESET_GPIO
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int "GPIO number to hold PHY #3 in RESET"
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depends on HAS_OMAP_EHCI_PHY3_RESET_GPIO
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endif
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config USB_EHCI_VF
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bool "Support for Vybrid on-chip EHCI USB controller"
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depends on ARCH_VF610
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@ -23,8 +23,6 @@
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*/
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#ifdef CONFIG_SPL_BUILD
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#undef CONFIG_USB_EHCI_OMAP
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#else
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
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#endif
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/* I2C */
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@ -41,9 +41,6 @@
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#endif /* CONFIG_SPL_OS_BOOT */
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#endif /* CONFIG_MTD_RAW_NAND */
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/* USB EHCI */
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
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/* Enable Multi Bus support for I2C */
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#define CONFIG_I2C_MULTI_BUS
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@ -27,9 +27,6 @@
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#ifdef CONFIG_SPL_BUILD
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#undef CONFIG_USB_EHCI_OMAP
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#endif
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#ifdef CONFIG_USB_EHCI_OMAP
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 4
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#endif
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/* Board NAND Info. */
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#ifdef CONFIG_MTD_RAW_NAND
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@ -16,8 +16,6 @@
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*/
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/* USB UHH support options */
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 1
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#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 62
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/* USB Networking options */
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@ -43,9 +43,6 @@
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/* USB UHH support options */
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 80
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#define CONFIG_OMAP_EHCI_PHY3_RESET_GPIO 79
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/* Enabled commands */
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/* USB Networking options */
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@ -43,8 +43,6 @@
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#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
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115200}
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/* EHCI */
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#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
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#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
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