arm: dts: k3-j721e: Enable ospi1/qspi
Enable the ospi1/qspi for both r5 and a72 configurations. Signed-off-by: Keerthy <j-keerthy@ti.com>
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4ca78154e1
commit
896cf0e20a
@ -365,3 +365,15 @@
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u-boot,dm-spl;
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};
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};
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&ospi1 {
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u-boot,dm-spl;
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flash@0 {
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u-boot,dm-spl;
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};
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};
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&mcu_fss0_ospi1_pins_default {
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u-boot,dm-spl;
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};
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@ -134,6 +134,20 @@
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J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
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>;
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};
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mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
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u-boot,dm-spl;
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
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J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
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J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
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J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
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J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
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J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
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J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
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J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
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>;
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};
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};
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&main_pmx0 {
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