arm: mvebu: spl: Add option to reset the board on DDR training failure
Some boards may occacionally fail DDR training. Currently we hang() in this case. Add an option that makes the board do an immediate reset in such a case, so that a new training is tried as soon as possible, instead of hanging and possibly waiting for watchdog to reset the board. (If the DDR training fails while booting the image via UART, we will still hang - it doesn't make sense to reset in such a case, because after reset the board will try booting from another medium, and the UART booting utility does not expect that.) Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
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@ -213,6 +213,19 @@ config DDR_LOG_LEVEL
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At level 3, rovides the windows margin of each DQ as a results of
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DQS centeralization.
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config DDR_RESET_ON_TRAINING_FAILURE
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bool "Reset the board on DDR training failure instead of hanging"
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depends on ARMADA_38X || ARMADA_XP
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help
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If DDR training fails in SPL, reset the board instead of hanging.
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Some boards are known to fail DDR training occasionally and an
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immediate reset may be preferable to waiting until the board is
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reset by watchdog (if there even is one).
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Note that if booting via UART and the DDR training fails, the
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device will still hang - it doesn't make sense to reset the board
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in such a case.
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config SYS_BOARD
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default "clearfog" if TARGET_CLEARFOG
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default "helios4" if TARGET_HELIOS4
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@ -4,6 +4,7 @@
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <hang.h>
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@ -330,7 +331,11 @@ void board_init_f(ulong dummy)
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ret = ddr3_init();
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if (ret) {
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printf("ddr3_init() failed: %d\n", ret);
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hang();
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if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE) &&
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get_boot_device() != BOOT_DEVICE_UART)
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reset_cpu();
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else
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hang();
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}
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#endif
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