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sunxi: gpio: Fix up pointer arithmetic

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The calls for flipping bits in the Allwinner pin controller registers
were using unnecessarily complex pointer arithmetic.

Improve readability by simplifying the expression.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Andre Przywara 2022-01-30 01:19:42 +00:00
parent fb6f67013e
commit 8695b5111c
1 changed files with 4 additions and 4 deletions
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8
arch/arm/mach-sunxi/pinmux.c
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@ -14,7 +14,7 @@ void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val)
u32 index = GPIO_CFG_INDEX(bank_offset);
u32 offset = GPIO_CFG_OFFSET(bank_offset);
clrsetbits_le32(&pio->cfg[0] + index, 0xf << offset, val << offset);
clrsetbits_le32(&pio->cfg[index], 0xf << offset, val << offset);
}
void sunxi_gpio_set_cfgpin(u32 pin, u32 val)
@ -31,7 +31,7 @@ int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset)
u32 offset = GPIO_CFG_OFFSET(bank_offset);
u32 cfg;
cfg = readl(&pio->cfg[0] + index);
cfg = readl(&pio->cfg[index]);
cfg >>= offset;
return cfg & 0xf;
@ -58,7 +58,7 @@ void sunxi_gpio_set_drv_bank(struct sunxi_gpio *pio, u32 bank_offset, u32 val)
u32 index = GPIO_DRV_INDEX(bank_offset);
u32 offset = GPIO_DRV_OFFSET(bank_offset);
clrsetbits_le32(&pio->drv[0] + index, 0x3 << offset, val << offset);
clrsetbits_le32(&pio->drv[index], 0x3 << offset, val << offset);
}
void sunxi_gpio_set_pull(u32 pin, u32 val)
@ -74,5 +74,5 @@ void sunxi_gpio_set_pull_bank(struct sunxi_gpio *pio, int bank_offset, u32 val)
u32 index = GPIO_PULL_INDEX(bank_offset);
u32 offset = GPIO_PULL_OFFSET(bank_offset);
clrsetbits_le32(&pio->pull[0] + index, 0x3 << offset, val << offset);
clrsetbits_le32(&pio->pull[index], 0x3 << offset, val << offset);
}