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85xx/86xx: Move to dynamic mgmt of LAWs

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With the new LAW interface (set_next_law) we can move to letting the
system allocate which LAWs are used for what purpose.  This makes life
a bit easier going forward with the new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
This commit is contained in:
Kumar Gala
2008-06-11 00:51:45 -05:00
committed by Andrew Fleming-AFLEMING
parent f060054dad
commit 859a86a25c
23 changed files with 124 additions and 127 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
cpu/mpc85xx/spd_sdram.c
View File

@@ -1090,7 +1090,7 @@ setup_laws_and_tlbs(unsigned int memsize)
*/
#ifdef CONFIG_FSL_LAW
set_law(1, CFG_DDR_SDRAM_BASE, law_size, LAW_TRGT_IF_DDR);
set_next_law(CFG_DDR_SDRAM_BASE, law_size, LAW_TRGT_IF_DDR);
#endif
/*

3
cpu/mpc86xx/cpu_init.c
View File

@@ -119,8 +119,5 @@ void cpu_init_f(void)
*/
int cpu_init_r(void)
{
#ifdef CONFIG_FSL_LAW
disable_law(0);
#endif
return 0;
}

6
cpu/mpc86xx/spd_sdram.c
View File

@@ -1183,7 +1183,7 @@ spd_sdram(void)
* Set up LAWBAR for DDR 1 space.
*/
#ifdef CONFIG_FSL_LAW
set_law(1, CFG_DDR_SDRAM_BASE, law_size_interleaved, LAW_TRGT_IF_DDR_INTRLV);
set_next_law(CFG_DDR_SDRAM_BASE, law_size_interleaved, LAW_TRGT_IF_DDR_INTRLV);
#endif
debug("Interleaved memory size is 0x%08lx\n", memsize_total);
@@ -1238,7 +1238,7 @@ spd_sdram(void)
* Set up LAWBAR for DDR 1 space.
*/
#ifdef CONFIG_FSL_LAW
set_law(1, CFG_DDR_SDRAM_BASE, law_size_ddr1, LAW_TRGT_IF_DDR_1);
set_next_law(CFG_DDR_SDRAM_BASE, law_size_ddr1, LAW_TRGT_IF_DDR_1);
#endif
}
@@ -1265,7 +1265,7 @@ spd_sdram(void)
* Set up LAWBAR for DDR 2 space.
*/
#ifdef CONFIG_FSL_LAW
set_law(8,
set_next_law(
(ddr1_enabled ? (memsize_ddr1 * 1024 * 1024) : CFG_DDR_SDRAM_BASE),
law_size_ddr2, LAW_TRGT_IF_DDR_2);
#endif