Merge git://git.denx.de/u-boot-fsl-qoriq
- Enable DHCP as boot-source in distro boot for NXP layerscape platforms - fix register layout for SEC on Layerscape architectures - fixes related to DPAA2 ethernet
This commit is contained in:
@@ -1005,6 +1005,7 @@ config TARGET_LS2080A_EMU
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select ARCH_MISC_INIT
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select ARM64
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select ARMV8_MULTIENTRY
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select FSL_DDR_SYNC_REFRESH
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help
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Support for Freescale LS2080A_EMU platform
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The LS2080A Development System (EMULATOR) is a pre silicon
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@@ -1031,6 +1032,7 @@ config TARGET_LS1088AQDS
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select ARMV8_MULTIENTRY
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select BOARD_LATE_INIT
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select SUPPORT_SPL
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select FSL_DDR_INTERACTIVE if !SD_BOOT
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help
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Support for NXP LS1088AQDS platform
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The LS1088A Development System (QDS) is a high-performance
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@@ -1047,6 +1049,8 @@ config TARGET_LS2080AQDS
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select SUPPORT_SPL
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imply SCSI
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imply SCSI_AHCI
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select FSL_DDR_BIST
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select FSL_DDR_INTERACTIVE if !SPL
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help
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Support for Freescale LS2080AQDS platform
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The LS2080A Development System (QDS) is a high-performance
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@@ -1061,6 +1065,8 @@ config TARGET_LS2080ARDB
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select ARMV8_MULTIENTRY
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select BOARD_LATE_INIT
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select SUPPORT_SPL
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select FSL_DDR_BIST
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select FSL_DDR_INTERACTIVE if !SPL
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imply SCSI
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imply SCSI_AHCI
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help
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@@ -1205,6 +1211,7 @@ config TARGET_LS1088ARDB
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select ARMV8_MULTIENTRY
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select BOARD_LATE_INIT
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select SUPPORT_SPL
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select FSL_DDR_INTERACTIVE if !SD_BOOT
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help
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Support for NXP LS1088ARDB platform.
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The LS1088A Reference design board (RDB) is a high-performance
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@@ -1223,6 +1230,7 @@ config TARGET_LS1021AQDS
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select LS1_DEEP_SLEEP
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select SUPPORT_SPL
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select SYS_FSL_DDR
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select FSL_DDR_INTERACTIVE
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imply SCSI
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config TARGET_LS1021ATWR
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@@ -1262,6 +1270,7 @@ config TARGET_LS1043AQDS
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select BOARD_EARLY_INIT_F
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select BOARD_LATE_INIT
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select SUPPORT_SPL
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select FSL_DDR_INTERACTIVE if !SPL
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imply SCSI
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imply SCSI_AHCI
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help
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@@ -1287,6 +1296,9 @@ config TARGET_LS1046AQDS
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select BOARD_LATE_INIT
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select DM_SPI_FLASH if DM_SPI
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select SUPPORT_SPL
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select FSL_DDR_BIST if !SPL
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select FSL_DDR_INTERACTIVE if !SPL
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select FSL_DDR_INTERACTIVE if !SPL
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imply SCSI
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help
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Support for Freescale LS1046AQDS platform.
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@@ -1304,6 +1316,8 @@ config TARGET_LS1046ARDB
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select DM_SPI_FLASH if DM_SPI
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select POWER_MC34VR500
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select SUPPORT_SPL
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select FSL_DDR_BIST
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select FSL_DDR_INTERACTIVE if !SPL
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imply SCSI
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help
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Support for Freescale LS1046ARDB platform.
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@@ -43,7 +43,7 @@ struct icid_id_table icid_tbl[] = {
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SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID),
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SET_QE_ICID(FSL_QE_STREAM_ID),
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#ifdef CONFIG_FSL_CAAM
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SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2),
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SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END),
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SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3),
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SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4),
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SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5),
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@@ -41,7 +41,7 @@ struct icid_id_table icid_tbl[] = {
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SET_ETR_ICID(FSL_ETR_STREAM_ID),
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SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID),
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#ifdef CONFIG_FSL_CAAM
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SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2),
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SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END),
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SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3),
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SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4),
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SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5),
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@@ -9,6 +9,7 @@
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#include <asm/types.h>
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#include <fsl_qbman.h>
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#include <fsl_sec.h>
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#include <asm/armv8/sec_firmware.h>
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struct icid_id_table {
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const char *compat;
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@@ -93,13 +94,18 @@ void fdt_fixup_icid(void *blob);
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#define SET_SEC_QI_ICID(streamid) \
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SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \
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(((streamid) << 16) | (streamid)), \
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offsetof(ccsr_sec_t, qilcr_ls) + \
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0, offsetof(ccsr_sec_t, qilcr_ls) + \
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CONFIG_SYS_FSL_SEC_ADDR, \
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CONFIG_SYS_FSL_SEC_ADDR)
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#define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \
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SET_ICID_ENTRY("fsl,sec-v4.0-job-ring", streamid, \
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SET_ICID_ENTRY( \
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(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT && \
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(FSL_SEC_JR##jr_num##_OFFSET == \
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SEC_JR3_OFFSET + CONFIG_SYS_FSL_SEC_OFFSET) \
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? NULL \
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: "fsl,sec-v4.0-job-ring"), \
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streamid, \
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(((streamid) << 16) | (streamid)), \
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offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \
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CONFIG_SYS_FSL_SEC_ADDR, \
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@@ -37,6 +37,7 @@ config TARGET_B4860QDS
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select BOARD_LATE_INIT if CHAIN_OF_TRUST
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select SUPPORT_SPL
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select PHYS_64BIT
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select FSL_DDR_INTERACTIVE if !SPL_BUILD
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imply PANIC_HANG
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config TARGET_BSC9131RDB
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@@ -51,6 +52,7 @@ config TARGET_BSC9132QDS
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select BOARD_LATE_INIT if CHAIN_OF_TRUST
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select SUPPORT_SPL
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select BOARD_EARLY_INIT_F
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select FSL_DDR_INTERACTIVE
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config TARGET_C29XPCIE
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bool "Support C29XPCIE"
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@@ -165,6 +167,7 @@ config TARGET_P1022DS
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config TARGET_P1023RDB
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bool "Support P1023RDB"
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select ARCH_P1023
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select FSL_DDR_INTERACTIVE
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imply CMD_EEPROM
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imply PANIC_HANG
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@@ -273,6 +276,7 @@ config TARGET_T1023RDB
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select BOARD_LATE_INIT if CHAIN_OF_TRUST
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select SUPPORT_SPL
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select PHYS_64BIT
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select FSL_DDR_INTERACTIVE
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imply CMD_EEPROM
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imply PANIC_HANG
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@@ -282,6 +286,7 @@ config TARGET_T1024RDB
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select BOARD_LATE_INIT if CHAIN_OF_TRUST
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select SUPPORT_SPL
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select PHYS_64BIT
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select FSL_DDR_INTERACTIVE
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imply CMD_EEPROM
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imply PANIC_HANG
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@@ -290,6 +295,7 @@ config TARGET_T1040QDS
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select ARCH_T1040
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select BOARD_LATE_INIT if CHAIN_OF_TRUST
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select PHYS_64BIT
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select FSL_DDR_INTERACTIVE
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imply CMD_EEPROM
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imply CMD_SATA
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imply PANIC_HANG
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@@ -344,6 +350,8 @@ config TARGET_T2080QDS
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select BOARD_LATE_INIT if CHAIN_OF_TRUST
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select SUPPORT_SPL
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select PHYS_64BIT
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select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
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select FSL_DDR_INTERACTIVE
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imply CMD_SATA
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config TARGET_T2080RDB
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@@ -360,6 +368,8 @@ config TARGET_T2081QDS
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select ARCH_T2081
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select SUPPORT_SPL
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select PHYS_64BIT
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select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
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select FSL_DDR_INTERACTIVE
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config TARGET_T4160QDS
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bool "Support T4160QDS"
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@@ -383,6 +393,7 @@ config TARGET_T4240QDS
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select BOARD_LATE_INIT if CHAIN_OF_TRUST
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select SUPPORT_SPL
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select PHYS_64BIT
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select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
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imply CMD_SATA
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imply PANIC_HANG
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@@ -391,6 +402,7 @@ config TARGET_T4240RDB
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select ARCH_T4240
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select SUPPORT_SPL
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select PHYS_64BIT
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select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
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imply CMD_SATA
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imply PANIC_HANG
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@@ -402,6 +414,7 @@ config TARGET_KMP204X
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bool "Support kmp204x"
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select ARCH_P2041
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select PHYS_64BIT
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select FSL_DDR_INTERACTIVE
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imply CMD_CRAMFS
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imply FS_CRAMFS
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@@ -21,6 +21,7 @@ config TARGET_MPC8610HPCD
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config TARGET_MPC8641HPCN
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bool "Support MPC8641HPCN"
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select ARCH_MPC8641
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select FSL_DDR_INTERACTIVE
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imply SCSI
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config TARGET_XPEDITE517X
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