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* Patches by Yuli Barcohen, 13 Jul 2003:

Browse Source 
- Correct flash and JFFS2 support for MPC8260ADS
  - fix PVR values and clock generation for PowerQUICC II family
    (8270/8275/8280)

* Patch by Bernhard Kuhn, 08 Jul 2003:
  - add support for M68K targets

* Patch by Ken Chou, 3 Jul:
  - Fix PCI config table for A3000
  - Fix iobase for natsemi.c
    (PCI_BASE_ADDRESS_0 is the IO base register for DP83815)

* Allow to enable "slow" POST routines by key press on power-on
* Fix temperature dependend switching of LCD backlight on LWMON
* Tweak output format for LWMON
This commit is contained in:
wdenk
2003-07-14 22:13:32 +00:00
parent 5702923e23
commit 8564acf936
40 changed files with 818 additions and 445 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
cpu/mpc8260/speed.c
View File

@@ -120,15 +120,19 @@ int get_clocks (void)
scmr = immap->im_clkrst.car_scmr;
corecnf = (scmr & SCMR_CORECNF_MSK) >> SCMR_CORECNF_SHIFT;
busdf = (scmr & SCMR_BUSDF_MSK) >> SCMR_BUSDF_SHIFT;
cpmdf = (scmr & SCMR_CPMDF_MSK) >> SCMR_CPMDF_SHIFT;
plldf = (scmr & SCMR_PLLDF) ? 1 : 0;
pllmf = (scmr & SCMR_PLLMF_MSK) >> SCMR_PLLMF_SHIFT;
cp = &corecnf_tab[corecnf];
gd->vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
busdf = (scmr & SCMR_BUSDF_MSK) >> SCMR_BUSDF_SHIFT;
cpmdf = (scmr & SCMR_CPMDF_MSK) >> SCMR_CPMDF_SHIFT;
if (get_pvr () == PVR_8260_HIP7) { /* HiP7 */
pllmf = (scmr & SCMR_PLLMF_MSKH7) >> SCMR_PLLMF_SHIFT;
gd->vco_out = clkin * (pllmf + 1);
} else { /* HiP3, HiP4 */
pllmf = (scmr & SCMR_PLLMF_MSK) >> SCMR_PLLMF_SHIFT;
plldf = (scmr & SCMR_PLLDF) ? 1 : 0;
gd->vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
}
#if 0
if (gd->vco_out / (busdf + 1) != clkin) {
/* aaarrrggghhh!!! */