arm: at91: reworked meesc board support
Signed-off-by: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
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@ -3,7 +3,7 @@
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* (C) Copyright 2009-2011
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* (C) Copyright 2009-2015
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* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
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* esd electronic system design gmbh <www.esd.eu>
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*
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@ -28,6 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
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* Miscelaneous platform dependent initialisations
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*/
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#ifdef CONFIG_REVISION_TAG
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static int hw_rev = -1; /* hardware revision */
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int get_hw_rev(void)
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@ -45,6 +46,7 @@ int get_hw_rev(void)
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return hw_rev;
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}
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#endif /* CONFIG_REVISION_TAG */
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#ifdef CONFIG_CMD_NAND
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static void meesc_nand_hw_init(void)
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@ -125,12 +127,18 @@ static void meesc_ethercat_hw_init(void)
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int dram_init(void)
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{
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gd->ram_size = get_ram_size(
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(void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
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PHYS_SDRAM_SIZE);
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
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}
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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@ -140,6 +148,7 @@ int board_eth_init(bd_t *bis)
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return rc;
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}
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#ifdef CONFIG_DISPLAY_BOARDINFO
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int checkboard(void)
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{
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char str[32];
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@ -173,10 +182,13 @@ int checkboard(void)
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puts(", serial# ");
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puts(str);
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}
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#ifdef CONFIG_REVISION_TAG
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printf("\nHardware-revision: 1.%d\n", get_hw_rev());
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#endif
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printf("Mach-type: %lu\n", gd->bd->bi_arch_number);
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return 0;
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}
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#endif /* CONFIG_DISPLAY_BOARDINFO */
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#ifdef CONFIG_SERIAL_TAG
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void get_board_serial(struct tag_serialnr *serialnr)
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@ -3,7 +3,7 @@
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* (C) Copyright 2009-2011
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* (C) Copyright 2009-2015
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* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
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* esd electronic system design gmbh <www.esd.eu>
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*
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@ -27,7 +27,7 @@
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* Since the linker has to swallow that define, we must use a pure
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* hex number here!
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*/
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#define CONFIG_SYS_TEXT_BASE 0x20002000
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#define CONFIG_SYS_TEXT_BASE 0x21F00000
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/*
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* since a number of boards are not being listed in linux
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@ -56,14 +56,13 @@
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#define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
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#define CONFIG_PREBOOT /* enable preboot variable */
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_OF_LIBFDT
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/*
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* Hardware drivers
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*/
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/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
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#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
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/* general purpose I/O */
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#define CONFIG_AT91_GPIO
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@ -87,10 +86,17 @@
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/*
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* Command line configuration.
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*/
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_IMLS
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#ifdef CONFIG_SYS_USE_NANDFLASH
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_USB
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#endif
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/* LED */
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#define CONFIG_AT91_LED
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@ -99,9 +105,12 @@
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* SDRAM: 1 bank, min 32, max 128 MB
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* Initialized before u-boot gets started.
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*/
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#define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */
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#define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
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#define CONFIG_SYS_SDRAM_SIZE 0x02000000
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE
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#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
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@ -133,7 +142,7 @@
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#ifdef CONFIG_CMD_NAND
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# define CONFIG_NAND_ATMEL
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# define CONFIG_SYS_MAX_NAND_DEVICE 1
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# define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
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# define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */
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# define CONFIG_SYS_NAND_DBW_8
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# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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@ -148,19 +157,6 @@
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#define CONFIG_NET_RETRY_COUNT 20
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#undef CONFIG_RESET_PHY_R
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/* USB */
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_DOS_PARTITION
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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/* CAN */
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#define CONFIG_AT91_CAN
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/* hw-controller addresses */
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#define CONFIG_ET1100_BASE 0x70000000
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@ -190,6 +186,8 @@
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_HUSH_PARSER
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/*
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* Size of malloc() pool
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