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arm64: zynqmp: Update the GPU address size

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The correct register size is 0x10000, otherwise
it overlaps with other register space.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Hyun Kwon
2017-08-21 18:54:29 -07:00
committed by Michal Simek
parent 59206dd1e3
commit 834ec8e9dd
1 changed files with 1 additions and 1 deletions
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arch/arm/dts/zynqmp.dtsi
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@@ -470,7 +470,7 @@
gpu: gpu@fd4b0000 { gpu: gpu@fd4b0000 {
status = "disabled"; status = "disabled";
compatible = "arm,mali-400", "arm,mali-utgard"; compatible = "arm,mali-400", "arm,mali-utgard";
reg = <0x0 0xfd4b0000 0x0 0x30000>; reg = <0x0 0xfd4b0000 0x0 0x10000>;
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>; interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";