T104xRDB: Remove non-TARGET_T1042D4RDB variants
At this point only the TARGET_T1042D4RDB variant of this is supported in tree, so remove the remaining parts of the other platforms. Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
@@ -1,6 +1,4 @@
|
||||
if TARGET_T1040RDB || TARGET_T1040D4RDB || \
|
||||
TARGET_T1042RDB || TARGET_T1042D4RDB || \
|
||||
TARGET_T1042RDB_PI
|
||||
if TARGET_T1042D4RDB
|
||||
|
||||
config SYS_BOARD
|
||||
default "t104xrdb"
|
||||
|
||||
@@ -20,7 +20,7 @@ struct cpld_data {
|
||||
u8 int_status; /* 0x12 - Interrupt status Register */
|
||||
u8 flash_ctl_status; /* 0x13 - Flash control and status register */
|
||||
u8 fan_ctl_status; /* 0x14 - Fan control and status register */
|
||||
#if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB)
|
||||
#if defined(CONFIG_TARGET_T1042D4RDB)
|
||||
u8 int_mask; /* 0x15 - Interrupt mask Register */
|
||||
#else
|
||||
u8 led_ctl_status; /* 0x15 - LED control and status register */
|
||||
|
||||
@@ -39,25 +39,6 @@ int board_eth_init(struct bd_info *bis)
|
||||
int idx = i - FM1_DTSEC1;
|
||||
|
||||
switch (fm_info_get_enet_if(i)) {
|
||||
#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1040D4RDB)
|
||||
case PHY_INTERFACE_MODE_SGMII:
|
||||
/* T1040RDB & T1040D4RDB only supports SGMII on
|
||||
* DTSEC3
|
||||
*/
|
||||
fm_info_set_phy_address(FM1_DTSEC3,
|
||||
CFG_SYS_SGMII1_PHY_ADDR);
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_TARGET_T1042RDB
|
||||
case PHY_INTERFACE_MODE_SGMII:
|
||||
/* T1042RDB doesn't supports SGMII on DTSEC1 & DTSEC2 */
|
||||
if ((FM1_DTSEC1 == i) || (FM1_DTSEC2 == i))
|
||||
fm_info_set_phy_address(i, 0);
|
||||
/* T1042RDB only supports SGMII on DTSEC3 */
|
||||
fm_info_set_phy_address(FM1_DTSEC3,
|
||||
CFG_SYS_SGMII1_PHY_ADDR);
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_TARGET_T1042D4RDB
|
||||
case PHY_INTERFACE_MODE_SGMII:
|
||||
/* T1042D4RDB supports SGMII on DTSEC1, DTSEC2
|
||||
|
||||
@@ -34,7 +34,7 @@ int checkboard(void)
|
||||
struct cpu_type *cpu = gd->arch.cpu;
|
||||
u8 sw;
|
||||
|
||||
#if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB)
|
||||
#if defined(CONFIG_TARGET_T1042D4RDB)
|
||||
printf("Board: %sD4RDB\n", cpu->name);
|
||||
#else
|
||||
printf("Board: %sRDB\n", cpu->name);
|
||||
@@ -110,23 +110,6 @@ int misc_init_r(void)
|
||||
CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) |
|
||||
MISC_CTL_SG_SEL | MISC_CTL_AURORA_SEL);
|
||||
|
||||
#if defined(CONFIG_TARGET_T1040D4RDB)
|
||||
if (hwconfig("qe-tdm")) {
|
||||
CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) |
|
||||
MISC_MUX_QE_TDM);
|
||||
printf("QECSR : 0x%02x, mux to qe-tdm\n",
|
||||
CPLD_READ(sfp_ctl_status));
|
||||
}
|
||||
/* Mask all CPLD interrupt sources, except QSGMII interrupts */
|
||||
if (CPLD_READ(sw_ver) < 0x03) {
|
||||
debug("CPLD SW version 0x%02x doesn't support int_mask\n",
|
||||
CPLD_READ(sw_ver));
|
||||
} else {
|
||||
CPLD_WRITE(int_mask, CPLD_INT_MASK_ALL &
|
||||
~(CPLD_INT_MASK_QSGMII1 | CPLD_INT_MASK_QSGMII2));
|
||||
}
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user