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Merge branch 'master' of git://git.denx.de/u-boot-sunxi

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This commit is contained in:
Tom Rini
2018-06-04 08:55:00 -04:00
parent b5351a4390 2e8dbe14e7
commit 809e0e398a
34 changed files with 1286 additions and 586 deletions
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1
arch/arm/dts/Makefile
View File

@@ -382,6 +382,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-orangepi-prime.dtb \
sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-amarula-relic.dtb \
sun50i-a64-bananapi-m64.dtb \
sun50i-a64-nanopi-a64.dtb \
sun50i-a64-olinuxino.dtb \

65
arch/arm/dts/sun50i-a64-amarula-relic.dts Normal file
View File

@@ -0,0 +1,65 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 Amarula Solutions B.V.
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
/dts-v1/;
#include "sun50i-a64.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Amarula A64-Relic";
compatible = "amarula,a64-relic", "allwinner,sun50i-a64";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&ehci0 {
status = "okay";
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci0 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
status = "okay";
};

26
arch/arm/dts/sun50i-a64-bananapi-m64.dts
View File

@@ -68,6 +68,14 @@
};
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
@@ -108,6 +116,14 @@
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
@@ -119,3 +135,13 @@
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
status = "okay";
};

71
arch/arm/dts/sun50i-h5-orangepi-pc2.dts
View File

@@ -50,6 +50,11 @@
model = "OrangePi PC 2";
compatible = "xunlong,orangepi-pc-2", "allwinner,sun50i-h5";
aliases {
serial0 = &uart0;
ethernet0 = &emac;
};
chosen {
stdout-path = "serial0:115200n8";
};
@@ -58,11 +63,6 @@
reg = <0x40000000 0x40000000>;
};
aliases {
serial0 = &uart0;
ethernet0 = &emac;
};
soc {
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
@@ -73,30 +73,7 @@
};
};
&mmc0 {
compatible = "allwinner,sun50i-h5-mmc",
"allwinner,sun50i-a64-mmc",
"allwinner,sun5i-a13-mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
cd-inverted;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&usbphy {
status = "okay";
};
&ohci1 {
&ehci0 {
status = "okay";
};
@@ -118,3 +95,39 @@
reg = <1>;
};
};
&mmc0 {
compatible = "allwinner,sun50i-h5-mmc",
"allwinner,sun50i-a64-mmc",
"allwinner,sun5i-a13-mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
cd-inverted;
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
status = "okay";
};

13
arch/arm/dts/sun50i-h5-orangepi-prime.dts
View File

@@ -72,6 +72,10 @@
};
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
@@ -89,6 +93,10 @@
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
@@ -99,6 +107,11 @@
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
status = "okay";
};

20
arch/arm/dts/sun8i-a83t.dtsi
View File

@@ -230,13 +230,29 @@
reg = <0x01c19000 0x400>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mc";
phys = <&usbphy 0>;
phy-names = "usb";
status = "disabled";
};
usbphy: phy@1c19400 {
compatible = "allwinner,sun8i-a83t-usb-phy";
reg = <0x01c19400 0x10>,
<0x01c1a800 0x14>,
<0x01c1b800 0x14>;
reg-names = "phy_ctrl",
"pmu1",
"pmu2";
status = "disabled";
#phy-cells = <1>;
};
ehci0: usb@01c1a000 {
compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci";
reg = <0x01c1a000 0x100>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
@@ -244,6 +260,8 @@
compatible = "allwinner,sun8i-a83t-ohci", "generic-ohci";
reg = <0x01c1a400 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
@@ -251,6 +269,8 @@
compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci";
reg = <0x01c1b000 0x100>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usbphy 2>;
phy-names = "usb";
status = "disabled";
};

13
arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts
View File

@@ -93,6 +93,10 @@
};
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
@@ -146,6 +150,10 @@
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
@@ -189,6 +197,11 @@
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
/* USB VBUS is on as long as VCC-IO is on */
status = "okay";

32
arch/arm/dts/sun8i-h3.dtsi
View File

@@ -219,6 +219,19 @@
#size-cells = <0>;
};
usb_otg: usb@1c19000 {
compatible = "allwinner,sun8i-h3-musb";
reg = <0x01c19000 0x400>;
clocks = <&ccu CLK_BUS_OTG>;
resets = <&ccu RST_BUS_OTG>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mc";
phys = <&usbphy 0>;
phy-names = "usb";
extcon = <&usbphy 0>;
status = "disabled";
};
usbphy: phy@01c19400 {
compatible = "allwinner,sun8i-h3-usb-phy";
reg = <0x01c19400 0x2c>,
@@ -251,6 +264,25 @@
#phy-cells = <1>;
};
ehci0: usb@1c1a000 {
compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
reg = <0x01c1a000 0x100>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
status = "disabled";
};
ohci0: usb@1c1a400 {
compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
reg = <0x01c1a400 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
status = "disabled";
};
ehci1: usb@01c1b000 {
compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
reg = <0x01c1b000 0x100>;

12
arch/arm/dts/sunxi-u-boot.dtsi
View File

@@ -1,14 +1,5 @@
#include <config.h>
/*
* This is the maximum size the U-Boot binary can be, which is basically
* the start of the environment, minus the start of the U-Boot binary in
* the MMC. This makes the assumption that the MMC is using 512-bytes
* blocks, but devices using something other than that remains to be
* seen.
*/
#define UBOOT_MMC_MAX_SIZE (CONFIG_ENV_OFFSET - (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512))
/ {
binman {
filename = "u-boot-sunxi-with-spl.bin";
@@ -17,9 +8,6 @@
filename = "spl/sunxi-spl.bin";
};
u-boot-img {
#ifdef CONFIG_MMC
size = <UBOOT_MMC_MAX_SIZE>;
#endif
pos = <CONFIG_SPL_PAD_TO>;
};
};