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ARM: at91: clock: correct PRES offset for at91sam9x5

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on at91sam9x5 PRES offset is 4 in the PMC master
clock register.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Andreas Bießmann <andreas@biessmann.org>
This commit is contained in:
Heiko Schocher 2016-08-17 09:13:24 +02:00 committed by Andreas Bießmann
parent 20e00c1368
commit 806a5a3958
1 changed files with 6 additions and 0 deletions
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6
arch/arm/mach-at91/arm926ejs/clock.c
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@ -162,7 +162,13 @@ int at91_clock_init(unsigned long main_clock)
gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK); gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
freq = gd->arch.mck_rate_hz; freq = gd->arch.mck_rate_hz;
#if defined(CONFIG_AT91SAM9X5)
/* different in prescale on at91sam9x5 */
freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 4));
#else
freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */ freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */
#endif
#if defined(CONFIG_AT91SAM9G20) #if defined(CONFIG_AT91SAM9G20)
/* mdiv ; (x >> 7) = ((x >> 8) * 2) */ /* mdiv ; (x >> 7) = ((x >> 8) * 2) */
gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ? gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ?