fsl-qoriq: Update mc firmware size, address in LS1088A, LS2088A, LX2 Updates on ls1043aqds, ls1043ardb Refactor I2C MUX Code on fsl-qoriq platforms.
This commit is contained in:
commit
806734f41b
@ -3,7 +3,7 @@
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* Device Tree Include file for Freescale Layerscape-1043A family SoC.
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*
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* Copyright (C) 2015, Freescale Semiconductor
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* Copyright 2020 NXP
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* Copyright 2020-2021 NXP
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*
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* Mingkai Hu <Mingkai.hu@freescale.com>
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*/
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@ -117,13 +117,13 @@
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ethernet@e4000 {
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phy-handle = <&rgmii_phy1>;
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phy-connection-type = "rgmii-txid";
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phy-connection-type = "rgmii-id";
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status = "okay";
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};
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ethernet@e6000 {
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phy-handle = <&rgmii_phy2>;
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phy-connection-type = "rgmii-txid";
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phy-connection-type = "rgmii-id";
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status = "okay";
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};
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@ -21,6 +21,12 @@ config CMD_ESBC_VALIDATE
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esbc_validate - validate signature using RSA verification
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esbc_halt - put the core in spin loop (Secure Boot Only)
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config FSL_USE_PCA9547_MUX
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bool "Enable PCA9547 I2C Mux on Freescale boards"
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default n
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help
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This option enables the PCA9547 I2C mux on Freescale boards.
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config VID
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depends on DM_I2C
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bool "Enable Freescale VID"
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@ -15,6 +15,15 @@ ifdef MINIMAL
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# necessary to create built-in.o
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obj- := __dummy__.o
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else
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# include i2c_common.o once if either VID or FSL_USE_PCA9547_MUX
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I2C_COMMON=
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ifdef CONFIG_VID
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I2C_COMMON=y
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endif
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ifdef CONFIG_FSL_USE_PCA9547_MUX
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I2C_COMMON=y
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endif
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obj-$(CONFIG_FSL_CADMUS) += cadmus.o
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obj-$(CONFIG_FSL_VIA) += cds_via.o
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obj-$(CONFIG_FMAN_ENET) += fman.o
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@ -22,6 +31,8 @@ obj-$(CONFIG_FSL_PIXIS) += pixis.o
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ifndef CONFIG_SPL_BUILD
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obj-$(CONFIG_FSL_NGPIXIS) += ngpixis.o
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endif
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obj-$(I2C_COMMON) += i2c_common.o
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obj-$(CONFIG_FSL_USE_PCA9547_MUX) += i2c_mux.o
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obj-$(CONFIG_VID) += vid.o
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obj-$(CONFIG_FSL_QIXIS) += qixis.o
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obj-$(CONFIG_PQ_MDS_PIB) += pq-mds-pib.o
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34
board/freescale/common/i2c_common.c
Normal file
34
board/freescale/common/i2c_common.c
Normal file
@ -0,0 +1,34 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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* Copyright 2020-21 NXP
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* Copyright 2021 Microsoft Corporation
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*/
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#include <common.h>
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#include <i2c.h>
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#include "i2c_common.h"
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#ifdef CONFIG_DM_I2C
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/* If DM is in use, retrieve the chip for the specified bus number */
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int fsl_i2c_get_device(int address, int bus, DEVICE_HANDLE_T *dev)
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{
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int ret = i2c_get_chip_for_busnum(bus, address, 1, dev);
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if (ret)
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printf("I2C: Bus %d has no device with address 0x%02X\n",
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bus, address);
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return ret;
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}
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#else
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/* Handle is passed directly */
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int fsl_i2c_get_device(int address, int bus, DEVICE_HANDLE_T *dev)
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{
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*dev = address;
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return 0;
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}
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#endif
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30
board/freescale/common/i2c_common.h
Normal file
30
board/freescale/common/i2c_common.h
Normal file
@ -0,0 +1,30 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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* Copyright 2020-21 NXP
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* Copyright 2021 Microsoft Corporation
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*/
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#ifndef __NXP_I2C_COMMON_H__
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#define __NXP_I2C_COMMON_H__
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/* Common functionality shared by the I2C drivers for VID and the mux. */
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#ifdef CONFIG_DM_I2C
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#define DEVICE_HANDLE_T struct udevice *
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#define I2C_READ(dev, register, data, length) \
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dm_i2c_read(dev, register, data, length)
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#define I2C_WRITE(dev, register, data, length) \
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dm_i2c_write(dev, register, data, length)
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#else
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#define DEVICE_HANDLE_T int
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#define I2C_READ(dev, register, data, length) \
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i2c_read(dev, register, 1, data, length)
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#define I2C_WRITE(dev, register, data, length) \
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i2c_write(dev, register, 1, data, length)
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#endif
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int fsl_i2c_get_device(int address, int bus, DEVICE_HANDLE_T *dev);
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#endif
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40
board/freescale/common/i2c_mux.c
Normal file
40
board/freescale/common/i2c_mux.c
Normal file
@ -0,0 +1,40 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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* Copyright 2020-21 NXP
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* Copyright 2021 Microsoft Corporation
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*/
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#include <common.h>
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#include <i2c.h>
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#include "i2c_common.h"
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#include "i2c_mux.h"
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/*
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* A new Kconfig option for something that used to always be built should be
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* “default y”.
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*/
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#ifdef CONFIG_FSL_USE_PCA9547_MUX
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int select_i2c_ch_pca9547(u8 ch, int bus)
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{
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int ret;
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DEVICE_HANDLE_T dev;
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/* Open device handle */
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ret = fsl_i2c_get_device(I2C_MUX_PCA_ADDR_PRI, bus, &dev);
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if (ret) {
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printf("PCA: No PCA9547 device found\n");
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return ret;
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}
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ret = I2C_WRITE(dev, 0, &ch, sizeof(ch));
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if (ret) {
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printf("PCA: Unable to select channel %d (%d)\n", (int)ch, ret);
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return ret;
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}
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return 0;
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}
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#endif
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15
board/freescale/common/i2c_mux.h
Normal file
15
board/freescale/common/i2c_mux.h
Normal file
@ -0,0 +1,15 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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* Copyright 2020-21 NXP
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* Copyright 2021 Microsoft Corporation
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*/
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#ifndef __NXP_I2C_MUX_H__
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#define __NXP_I2C_MUX_H__
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#ifdef CONFIG_FSL_USE_PCA9547_MUX
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int select_i2c_ch_pca9547(u8 ch, int bus);
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#endif
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#endif
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@ -20,8 +20,13 @@
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#include <asm/immap_85xx.h>
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#endif
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#include <linux/delay.h>
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#include "i2c_common.h"
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#include "vid.h"
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#ifndef I2C_VOL_MONITOR_BUS
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#define I2C_VOL_MONITOR_BUS 0
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#endif
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/* Voltages are generally handled in mV to keep them as integers */
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#define MV_PER_V 1000
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@ -95,44 +100,6 @@ u16 __weak soc_get_fuse_vid(int vid_index)
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#define I2C_VOL_MONITOR_ADDR 0
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#endif
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#if CONFIG_IS_ENABLED(DM_I2C)
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#define DEVICE_HANDLE_T struct udevice *
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#ifndef I2C_VOL_MONITOR_BUS
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#define I2C_VOL_MONITOR_BUS 0
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#endif
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/* If DM is in use, retrieve the udevice chip for the specified bus number */
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static int vid_get_device(int address, DEVICE_HANDLE_T *dev)
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{
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int ret = i2c_get_chip_for_busnum(I2C_VOL_MONITOR_BUS, address, 1, dev);
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if (ret)
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printf("VID: Bus %d has no device with address 0x%02X\n",
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I2C_VOL_MONITOR_BUS, address);
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return ret;
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}
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#define I2C_READ(dev, register, data, length) \
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dm_i2c_read(dev, register, data, length)
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#define I2C_WRITE(dev, register, data, length) \
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dm_i2c_write(dev, register, data, length)
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#else
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#define DEVICE_HANDLE_T int
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/* If DM is not in use, I2C addresses are passed directly */
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static int vid_get_device(int address, DEVICE_HANDLE_T *dev)
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{
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*dev = address;
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return 0;
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}
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#define I2C_READ(dev, register, data, length) \
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i2c_read(dev, register, 1, data, length)
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#define I2C_WRITE(dev, register, data, length) \
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i2c_write(dev, register, 1, data, length)
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#endif
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#if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
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defined(CONFIG_VOL_MONITOR_IR36021_READ)
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/*
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@ -158,7 +125,7 @@ static int find_ir_chip_on_i2c(void)
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/* Check all the address */
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for (i = 0; i < (sizeof(ir_i2c_addr)/sizeof(ir_i2c_addr[0])); i++) {
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i2caddress = ir_i2c_addr[i];
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ret = vid_get_device(i2caddress, &dev);
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ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev);
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if (!ret) {
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ret = I2C_READ(dev, IR36021_MFR_ID_OFFSET,
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(void *)&mfrID, sizeof(mfrID));
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@ -202,7 +169,7 @@ static int read_voltage_from_INA220(int i2caddress)
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DEVICE_HANDLE_T dev;
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/* Open device handle */
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ret = vid_get_device(i2caddress, &dev);
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ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev);
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if (ret)
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return ret;
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@ -243,7 +210,7 @@ static int read_voltage_from_IR(int i2caddress)
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DEVICE_HANDLE_T dev;
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/* Open device handle */
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ret = vid_get_device(i2caddress, &dev);
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ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev);
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if (ret)
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return ret;
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@ -344,7 +311,7 @@ static int read_voltage_from_pmbus(int i2caddress)
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DEVICE_HANDLE_T dev;
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/* Open device handle */
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ret = vid_get_device(i2caddress, &dev);
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ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev);
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if (ret)
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return ret;
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@ -457,7 +424,7 @@ static int set_voltage_to_IR(int i2caddress, int vdd)
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DEVICE_HANDLE_T dev;
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/* Open device handle */
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ret = vid_get_device(i2caddress, &dev);
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ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev);
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if (ret)
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return ret;
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@ -503,7 +470,7 @@ static int set_voltage_to_pmbus(int i2caddress, int vdd)
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DEVICE_HANDLE_T dev;
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/* Open device handle */
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ret = vid_get_device(i2caddress, &dev);
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ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev);
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if (ret)
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return ret;
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@ -653,7 +620,7 @@ int adjust_vdd(ulong vdd_override)
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debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
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}
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ret = vid_get_device(i2caddress, &dev);
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ret = fsl_i2c_get_device(i2caddress, I2C_VOL_MONITOR_BUS, &dev);
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if (ret)
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return ret;
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@ -785,7 +752,6 @@ exit:
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i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);
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return ret < 0 ? -1 : 0;
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}
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static int do_vdd_override(struct cmd_tbl *cmdtp,
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@ -11,37 +11,13 @@
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#include <common.h>
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#include <fsl_dcu_fb.h>
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#include <i2c.h>
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#include "../common/i2c_mux.h"
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#include "div64.h"
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#include "../common/diu_ch7301.h"
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#include "ls1021aqds_qixis.h"
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DECLARE_GLOBAL_DATA_PTR;
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static int select_i2c_ch_pca9547(u8 ch, int bus_num)
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{
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int ret;
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#if CONFIG_IS_ENABLED(DM_I2C)
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struct udevice *dev;
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ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
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1, &dev);
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if (ret) {
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printf("%s: Cannot find udev for a bus %d\n", __func__,
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bus_num);
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return ret;
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}
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ret = dm_i2c_write(dev, 0, &ch, 1);
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#else
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ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
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#endif
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if (ret) {
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puts("PCA: failed to select proper channel\n");
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return ret;
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}
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return 0;
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}
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unsigned int dcu_set_pixel_clock(unsigned int pixclock)
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{
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unsigned long long div;
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|
@ -25,6 +25,7 @@
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#include <fsl_devdis.h>
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#include <fsl_validate.h>
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#include <fsl_ddr.h>
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#include "../common/i2c_mux.h"
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#include "../common/sleep.h"
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#include "../common/qixis.h"
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#include "ls1021aqds_qixis.h"
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@ -141,31 +142,6 @@ unsigned long get_board_ddr_clk(void)
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return 66666666;
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}
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int select_i2c_ch_pca9547(u8 ch, int bus_num)
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{
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int ret;
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#if CONFIG_IS_ENABLED(DM_I2C)
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struct udevice *dev;
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ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
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1, &dev);
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if (ret) {
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printf("%s: Cannot find udev for a bus %d\n", __func__,
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bus_num);
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return ret;
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}
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ret = dm_i2c_write(dev, 0, &ch, 1);
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#else
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ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
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#endif
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if (ret) {
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puts("PCA: failed to select proper channel\n");
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return ret;
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}
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return 0;
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}
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int dram_init(void)
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{
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/*
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|
@ -28,6 +28,7 @@
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#include <fsl_esdhc.h>
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#include <fsl_ifc.h>
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#include <spl.h>
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#include "../common/i2c_mux.h"
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#include "../common/qixis.h"
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#include "ls1043aqds_qixis.h"
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@ -279,32 +280,6 @@ unsigned long get_board_ddr_clk(void)
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return 66666666;
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}
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|
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int select_i2c_ch_pca9547(u8 ch, int bus_num)
|
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{
|
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int ret;
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#if CONFIG_IS_ENABLED(DM_I2C)
|
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struct udevice *dev;
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|
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ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
|
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1, &dev);
|
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if (ret) {
|
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printf("%s: Cannot find udev for a bus %d\n", __func__,
|
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bus_num);
|
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return ret;
|
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}
|
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ret = dm_i2c_write(dev, 0, &ch, 1);
|
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#else
|
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ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
|
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#endif
|
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if (ret) {
|
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puts("PCA: failed to select proper channel\n");
|
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return ret;
|
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}
|
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|
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return 0;
|
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}
|
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|
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int dram_init(void)
|
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{
|
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/*
|
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|
@ -22,6 +22,7 @@
|
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#include <fsl_esdhc.h>
|
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#include <fsl_sec.h>
|
||||
#include <fsl_dspi.h>
|
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#include "../common/i2c_mux.h"
|
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|
||||
#define LS1046A_PORSR1_REG 0x1EE0000
|
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#define BOOT_SRC_SD 0x20000000
|
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@ -38,32 +39,6 @@
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
int select_i2c_ch_pca9547(u8 ch, int bus_num)
|
||||
{
|
||||
int ret;
|
||||
|
||||
#if CONFIG_IS_ENABLED(DM_I2C)
|
||||
struct udevice *dev;
|
||||
|
||||
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
|
||||
1, &dev);
|
||||
if (ret) {
|
||||
printf("%s: Cannot find udev for a bus %d\n", __func__,
|
||||
bus_num);
|
||||
return ret;
|
||||
}
|
||||
ret = dm_i2c_write(dev, 0, &ch, 1);
|
||||
#else
|
||||
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
|
||||
#endif
|
||||
if (ret) {
|
||||
puts("PCA: failed to select proper channel\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void demux_select_usb2(void)
|
||||
{
|
||||
u32 val;
|
||||
|
@ -29,6 +29,7 @@
|
||||
#include <fsl_ifc.h>
|
||||
#include <fsl_sec.h>
|
||||
#include <spl.h>
|
||||
#include "../common/i2c_mux.h"
|
||||
|
||||
#include "../common/vid.h"
|
||||
#include "../common/qixis.h"
|
||||
@ -276,31 +277,6 @@ u32 get_lpuart_clk(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
int select_i2c_ch_pca9547(u8 ch, int bus_num)
|
||||
{
|
||||
int ret;
|
||||
#if CONFIG_IS_ENABLED(DM_I2C)
|
||||
struct udevice *dev;
|
||||
|
||||
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
|
||||
1, &dev);
|
||||
if (ret) {
|
||||
printf("%s: Cannot find udev for a bus %d\n", __func__,
|
||||
bus_num);
|
||||
return ret;
|
||||
}
|
||||
ret = dm_i2c_write(dev, 0, &ch, 1);
|
||||
#else
|
||||
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
|
||||
#endif
|
||||
if (ret) {
|
||||
puts("PCA: failed to select proper channel\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dram_init(void)
|
||||
{
|
||||
/*
|
||||
|
@ -26,6 +26,7 @@
|
||||
#include <asm/arch/fsl_serdes.h>
|
||||
#include <asm/arch/soc.h>
|
||||
#include <asm/arch-fsl-layerscape/fsl_icid.h>
|
||||
#include "../common/i2c_mux.h"
|
||||
|
||||
#include "../common/qixis.h"
|
||||
#include "ls1088a_qixis.h"
|
||||
@ -415,34 +416,13 @@ unsigned long get_board_ddr_clk(void)
|
||||
return 66666666;
|
||||
}
|
||||
|
||||
int select_i2c_ch_pca9547(u8 ch)
|
||||
{
|
||||
int ret;
|
||||
|
||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
|
||||
#else
|
||||
struct udevice *dev;
|
||||
|
||||
ret = i2c_get_chip_for_busnum(0, I2C_MUX_PCA_ADDR_PRI, 1, &dev);
|
||||
if (!ret)
|
||||
ret = dm_i2c_write(dev, 0, &ch, 1);
|
||||
#endif
|
||||
if (ret) {
|
||||
puts("PCA: failed to select proper channel\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if !defined(CONFIG_SPL_BUILD)
|
||||
void board_retimer_init(void)
|
||||
{
|
||||
u8 reg;
|
||||
|
||||
/* Retimer is connected to I2C1_CH5 */
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH5);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH5, 0);
|
||||
|
||||
/* Access to Control/Shared register */
|
||||
reg = 0x0;
|
||||
@ -532,7 +512,7 @@ void board_retimer_init(void)
|
||||
|
||||
#ifdef CONFIG_TARGET_LS1088AQDS
|
||||
/* Retimer is connected to I2C1_CH5 */
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH5);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH5, 0);
|
||||
|
||||
/* Access to Control/Shared register */
|
||||
reg = 0x0;
|
||||
@ -620,7 +600,7 @@ void board_retimer_init(void)
|
||||
|
||||
#endif
|
||||
/*return the default channel*/
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MISC_INIT_R
|
||||
@ -669,7 +649,7 @@ int misc_init_r(void)
|
||||
|
||||
int i2c_multiplexer_select_vid_channel(u8 channel)
|
||||
{
|
||||
return select_i2c_ch_pca9547(channel);
|
||||
return select_i2c_ch_pca9547(channel, 0);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_TARGET_LS1088AQDS
|
||||
@ -827,7 +807,7 @@ int board_init(void)
|
||||
u32 __iomem *irq_ccsr = (u32 __iomem *)ISC_BASE;
|
||||
#endif
|
||||
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
|
||||
board_retimer_init();
|
||||
|
||||
#ifdef CONFIG_ENV_IS_NOWHERE
|
||||
|
@ -23,7 +23,7 @@
|
||||
#include <fsl_sec.h>
|
||||
#include <asm/arch/ppa.h>
|
||||
#include <asm/arch-fsl-layerscape/fsl_icid.h>
|
||||
|
||||
#include "../common/i2c_mux.h"
|
||||
|
||||
#include "../common/qixis.h"
|
||||
#include "ls2080aqds_qixis.h"
|
||||
@ -161,27 +161,6 @@ unsigned long get_board_ddr_clk(void)
|
||||
return 66666666;
|
||||
}
|
||||
|
||||
int select_i2c_ch_pca9547(u8 ch)
|
||||
{
|
||||
int ret;
|
||||
#if CONFIG_IS_ENABLED(DM_I2C)
|
||||
struct udevice *dev;
|
||||
|
||||
ret = i2c_get_chip_for_busnum(0, I2C_MUX_PCA_ADDR_PRI, 1, &dev);
|
||||
if (!ret)
|
||||
ret = dm_i2c_write(dev, 0, &ch, 1);
|
||||
|
||||
#else
|
||||
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
|
||||
#endif
|
||||
if (ret) {
|
||||
puts("PCA: failed to select proper channel\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int config_board_mux(int ctrl_type)
|
||||
{
|
||||
u8 reg5;
|
||||
@ -235,7 +214,7 @@ int board_init(void)
|
||||
#ifdef CONFIG_ENV_IS_NOWHERE
|
||||
gd->env_addr = (ulong)&default_environment[0];
|
||||
#endif
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
|
||||
|
||||
#ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
|
||||
#if CONFIG_IS_ENABLED(DM_I2C)
|
||||
|
@ -25,6 +25,7 @@
|
||||
#include <asm/arch/ppa.h>
|
||||
#include <fsl_sec.h>
|
||||
#include <asm/arch-fsl-layerscape/fsl_icid.h>
|
||||
#include "../common/i2c_mux.h"
|
||||
|
||||
#ifdef CONFIG_FSL_QIXIS
|
||||
#include "../common/qixis.h"
|
||||
@ -205,31 +206,9 @@ unsigned long get_board_sys_clk(void)
|
||||
return 100000000;
|
||||
}
|
||||
|
||||
int select_i2c_ch_pca9547(u8 ch)
|
||||
{
|
||||
int ret;
|
||||
|
||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
|
||||
#else
|
||||
struct udevice *dev;
|
||||
|
||||
ret = i2c_get_chip_for_busnum(0, I2C_MUX_PCA_ADDR_PRI, 1, &dev);
|
||||
if (!ret)
|
||||
ret = dm_i2c_write(dev, 0, &ch, 1);
|
||||
#endif
|
||||
|
||||
if (ret) {
|
||||
puts("PCA: failed to select proper channel\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_multiplexer_select_vid_channel(u8 channel)
|
||||
{
|
||||
return select_i2c_ch_pca9547(channel);
|
||||
return select_i2c_ch_pca9547(channel, 0);
|
||||
}
|
||||
|
||||
int config_board_mux(int ctrl_type)
|
||||
@ -267,7 +246,7 @@ int board_init(void)
|
||||
#ifdef CONFIG_ENV_IS_NOWHERE
|
||||
gd->env_addr = (ulong)&default_environment[0];
|
||||
#endif
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
|
||||
|
||||
#ifdef CONFIG_FSL_QIXIS
|
||||
QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET_EN);
|
||||
|
@ -1,6 +1,7 @@
|
||||
LX2160ARDB BOARD
|
||||
M: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
|
||||
M: Priyanka Jain <priyanka.jain@nxp.com>
|
||||
M: Wasim Khan <wasim.khan@nxp.com>
|
||||
S: Maintained
|
||||
F: board/freescale/lx2160a/
|
||||
F: include/configs/lx2160a_common.h
|
||||
@ -16,6 +17,7 @@ F: configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
|
||||
|
||||
LX2160AQDS BOARD
|
||||
M: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
|
||||
M: Wasim Khan <wasim.khan@nxp.com>
|
||||
S: Maintained
|
||||
F: board/freescale/lx2160a/eth_lx2160aqds.h
|
||||
F: include/configs/lx2160aqds.h
|
||||
@ -29,6 +31,7 @@ F: configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
|
||||
|
||||
LX2162AQDS BOARD
|
||||
M: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
|
||||
M: Wasim Khan <wasim.khan@nxp.com>
|
||||
S: Maintained
|
||||
F: board/freescale/lx2160a/eth_lx2162aqds.h
|
||||
F: include/configs/lx2162aqds.h
|
||||
|
@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright 2018-2020 NXP
|
||||
* Copyright 2018-2021 NXP
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
@ -29,6 +29,8 @@
|
||||
#include <asm/arch/config.h>
|
||||
#include <asm/arch/fsl_serdes.h>
|
||||
#include <asm/arch/soc.h>
|
||||
#include "../common/i2c_mux.h"
|
||||
|
||||
#include "../common/qixis.h"
|
||||
#include "../common/vid.h"
|
||||
#include <fsl_immap.h>
|
||||
@ -79,27 +81,6 @@ U_BOOT_DRVINFO(nxp_serial1) = {
|
||||
.plat = &serial1,
|
||||
};
|
||||
|
||||
int select_i2c_ch_pca9547(u8 ch)
|
||||
{
|
||||
int ret;
|
||||
|
||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
|
||||
#else
|
||||
struct udevice *dev;
|
||||
|
||||
ret = i2c_get_chip_for_busnum(0, I2C_MUX_PCA_ADDR_PRI, 1, &dev);
|
||||
if (!ret)
|
||||
ret = dm_i2c_write(dev, 0, &ch, 1);
|
||||
#endif
|
||||
if (ret) {
|
||||
puts("PCA: failed to select proper channel\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void uart_get_clock(void)
|
||||
{
|
||||
serial0.clock = get_serial_clock();
|
||||
@ -115,10 +96,10 @@ int board_early_init_f(void)
|
||||
uart_get_clock();
|
||||
|
||||
#ifdef CONFIG_EMC2305
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_EMC2305);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_EMC2305, 0);
|
||||
emc2305_init(I2C_EMC2305_ADDR);
|
||||
set_fan_speed(I2C_EMC2305_PWM, I2C_EMC2305_ADDR);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
|
||||
#endif
|
||||
|
||||
fsl_lsch3_early_init_f();
|
||||
@ -275,7 +256,7 @@ int esdhc_status_fixup(void *blob, const char *compat)
|
||||
#if defined(CONFIG_VID)
|
||||
int i2c_multiplexer_select_vid_channel(u8 channel)
|
||||
{
|
||||
return select_i2c_ch_pca9547(channel);
|
||||
return select_i2c_ch_pca9547(channel, 0);
|
||||
}
|
||||
|
||||
int init_func_vid(void)
|
||||
@ -611,7 +592,7 @@ int board_init(void)
|
||||
gd->env_addr = (ulong)&default_environment[0];
|
||||
#endif
|
||||
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
|
||||
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
|
||||
|
||||
#if defined(CONFIG_FSL_MC_ENET) && defined(CONFIG_TARGET_LX2160ARDB)
|
||||
/* invert AQR107 IRQ pins polarity */
|
||||
@ -726,6 +707,116 @@ void board_quiesce_devices(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB)
|
||||
int fdt_fixup_add_thermal(void *blob, int mux_node, int channel, int reg)
|
||||
{
|
||||
int err;
|
||||
int noff;
|
||||
int offset;
|
||||
char channel_node_name[50];
|
||||
char thermal_node_name[50];
|
||||
u32 phandle;
|
||||
|
||||
snprintf(channel_node_name, sizeof(channel_node_name),
|
||||
"i2c@%x", channel);
|
||||
debug("channel_node_name = %s\n", channel_node_name);
|
||||
|
||||
snprintf(thermal_node_name, sizeof(thermal_node_name),
|
||||
"temperature-sensor@%x", reg);
|
||||
debug("thermal_node_name = %s\n", thermal_node_name);
|
||||
|
||||
err = fdt_increase_size(blob, 200);
|
||||
if (err) {
|
||||
printf("fdt_increase_size: err=%s\n", fdt_strerror(err));
|
||||
return err;
|
||||
}
|
||||
|
||||
noff = fdt_subnode_offset(blob, mux_node, (const char *)
|
||||
channel_node_name);
|
||||
if (noff < 0) {
|
||||
/* channel node not found - create it */
|
||||
noff = fdt_add_subnode(blob, mux_node, channel_node_name);
|
||||
if (noff < 0) {
|
||||
printf("fdt_add_subnode: err=%s\n", fdt_strerror(err));
|
||||
return err;
|
||||
}
|
||||
fdt_setprop_u32 (blob, noff, "#address-cells", 1);
|
||||
fdt_setprop_u32 (blob, noff, "#size-cells", 0);
|
||||
fdt_setprop_u32 (blob, noff, "reg", channel);
|
||||
}
|
||||
|
||||
/* Create thermal node*/
|
||||
offset = fdt_add_subnode(blob, noff, thermal_node_name);
|
||||
fdt_setprop(blob, offset, "compatible", "nxp,sa56004",
|
||||
strlen("nxp,sa56004") + 1);
|
||||
fdt_setprop_u32 (blob, offset, "reg", reg);
|
||||
|
||||
/* fixup phandle*/
|
||||
noff = fdt_node_offset_by_compatible(blob, -1, "regulator-fixed");
|
||||
if (noff < 0) {
|
||||
printf("%s : failed to get phandle\n", __func__);
|
||||
return noff;
|
||||
}
|
||||
phandle = fdt_get_phandle(blob, noff);
|
||||
fdt_setprop_u32 (blob, offset, "vcc-supply", phandle);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void fdt_fixup_delete_thermal(void *blob, int mux_node, int channel, int reg)
|
||||
{
|
||||
int node;
|
||||
int value;
|
||||
int err;
|
||||
int subnode;
|
||||
|
||||
fdt_for_each_subnode(subnode, blob, mux_node) {
|
||||
value = fdtdec_get_uint(blob, subnode, "reg", -1);
|
||||
if (value == channel) {
|
||||
/* delete thermal node */
|
||||
fdt_for_each_subnode(node, blob, subnode) {
|
||||
value = fdtdec_get_uint(blob, node, "reg", -1);
|
||||
err = fdt_node_check_compatible(blob, node,
|
||||
"nxp,sa56004");
|
||||
if (!err && value == reg) {
|
||||
fdt_del_node(blob, node);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void fdt_fixup_i2c_thermal_node(void *blob)
|
||||
{
|
||||
int i2coffset;
|
||||
int mux_node;
|
||||
int reg;
|
||||
int err;
|
||||
|
||||
i2coffset = fdt_node_offset_by_compat_reg(blob, "fsl,vf610-i2c",
|
||||
0x2000000);
|
||||
if (i2coffset != -FDT_ERR_NOTFOUND) {
|
||||
fdt_for_each_subnode(mux_node, blob, i2coffset) {
|
||||
reg = fdtdec_get_uint(blob, mux_node, "reg", -1);
|
||||
err = fdt_node_check_compatible(blob, mux_node,
|
||||
"nxp,pca9547");
|
||||
if (!err && reg == 0x77) {
|
||||
fdt_fixup_delete_thermal(blob, mux_node,
|
||||
0x3, 0x4d);
|
||||
err = fdt_fixup_add_thermal(blob, mux_node,
|
||||
0x3, 0x48);
|
||||
if (err)
|
||||
printf("%s: Add thermal node failed\n",
|
||||
__func__);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
printf("%s: i2c node not found\n", __func__);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_OF_BOARD_SETUP
|
||||
int ft_board_setup(void *blob, struct bd_info *bd)
|
||||
{
|
||||
@ -737,6 +828,9 @@ int ft_board_setup(void *blob, struct bd_info *bd)
|
||||
u64 mc_memory_base = 0;
|
||||
u64 mc_memory_size = 0;
|
||||
u16 total_memory_banks;
|
||||
#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB)
|
||||
u8 board_rev;
|
||||
#endif
|
||||
|
||||
ft_cpu_setup(blob, bd);
|
||||
|
||||
@ -791,6 +885,12 @@ int ft_board_setup(void *blob, struct bd_info *bd)
|
||||
#endif
|
||||
fdt_fixup_icid(blob);
|
||||
|
||||
#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB)
|
||||
board_rev = (QIXIS_READ(arch) & 0xf) - 1 + 'A';
|
||||
if (board_rev == 'C')
|
||||
fdt_fixup_i2c_thermal_node(blob);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
@ -22,6 +22,7 @@
|
||||
#include <asm/fsl_serdes.h>
|
||||
#include <asm/fsl_liodn.h>
|
||||
#include <fm_eth.h>
|
||||
#include "../common/i2c_mux.h"
|
||||
|
||||
#include "../common/qixis.h"
|
||||
#include "../common/vsc3316_3308.h"
|
||||
@ -79,31 +80,6 @@ int checkboard(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int select_i2c_ch_pca9547(u8 ch, int bus_num)
|
||||
{
|
||||
int ret;
|
||||
|
||||
#if CONFIG_IS_ENABLED(DM_I2C)
|
||||
struct udevice *dev;
|
||||
|
||||
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI, 1, &dev);
|
||||
if (ret) {
|
||||
printf("%s: Cannot find udev for a bus %d\n", __func__,
|
||||
bus_num);
|
||||
return ret;
|
||||
}
|
||||
ret = dm_i2c_write(dev, 0, &ch, 1);
|
||||
#else
|
||||
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
|
||||
#endif
|
||||
if (ret) {
|
||||
puts("PCA: failed to select proper channel\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_multiplexer_select_vid_channel(u8 channel)
|
||||
{
|
||||
return select_i2c_ch_pca9547(channel, 0);
|
||||
|
@ -83,3 +83,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_ADDR_MAP=y
|
||||
CONFIG_SYS_NUM_ADDR_MAP=64
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -80,3 +80,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_ADDR_MAP=y
|
||||
CONFIG_SYS_NUM_ADDR_MAP=64
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -70,3 +70,4 @@ CONFIG_SYS_NUM_ADDR_MAP=64
|
||||
CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_SOFTWARE_EXP=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -82,3 +82,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_ADDR_MAP=y
|
||||
CONFIG_SYS_NUM_ADDR_MAP=64
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -60,3 +60,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_ADDR_MAP=y
|
||||
CONFIG_SYS_NUM_ADDR_MAP=64
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -68,3 +68,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_ADDR_MAP=y
|
||||
CONFIG_SYS_NUM_ADDR_MAP=64
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -69,3 +69,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -69,3 +69,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -84,3 +84,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -68,3 +68,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -70,3 +70,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -70,3 +70,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -69,3 +69,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -83,3 +83,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -81,3 +81,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -69,3 +69,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -71,3 +71,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -85,3 +85,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -70,3 +70,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -36,6 +36,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_sy
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_ENV_ADDR=0x40300000
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_DM=y
|
||||
CONFIG_SATA_CEVA=y
|
||||
@ -66,3 +67,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -86,3 +86,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -80,3 +80,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -47,6 +47,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SF_DEFAULT_BUS=1
|
||||
# CONFIG_SPI_FLASH_BAR is not set
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYLIB_10G=y
|
||||
@ -72,3 +73,4 @@ CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_SOFTWARE_EXP=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -44,6 +44,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_USE_ENV_SPI_BUS=y
|
||||
CONFIG_ENV_SPI_BUS=0
|
||||
CONFIG_ENV_ADDR=0x60500000
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_DM=y
|
||||
CONFIG_SATA_CEVA=y
|
||||
CONFIG_FSL_CAAM=y
|
||||
@ -79,3 +80,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -60,3 +60,4 @@ CONFIG_USB_ETHER_ASIX=y
|
||||
CONFIG_USB_ETHER_ASIX88179=y
|
||||
CONFIG_USB_ETHER_RTL8152=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -68,3 +68,4 @@ CONFIG_USB_HOST_ETHER=y
|
||||
CONFIG_USB_ETHER_ASIX=y
|
||||
CONFIG_USB_ETHER_ASIX88179=y
|
||||
CONFIG_USB_ETHER_RTL8152=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -70,3 +70,4 @@ CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -72,3 +72,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -74,3 +74,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -80,3 +80,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -70,3 +70,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -90,3 +90,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -85,3 +85,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -72,3 +72,4 @@ CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -82,3 +82,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -61,6 +61,7 @@ CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
|
@ -43,6 +43,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
|
@ -47,6 +47,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
|
@ -64,6 +64,7 @@ CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
|
@ -61,6 +61,7 @@ CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
|
@ -60,6 +60,7 @@ CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
|
@ -43,6 +43,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
|
@ -49,6 +49,7 @@ CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_AQUANTIA=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_MDIO=y
|
||||
CONFIG_E1000=y
|
||||
|
@ -74,3 +74,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -75,3 +75,4 @@ CONFIG_USB_GADGET=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_RSA_SOFTWARE_EXP=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -76,3 +76,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -82,3 +82,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -85,3 +85,4 @@ CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -100,3 +100,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -76,3 +76,4 @@ CONFIG_USB_GADGET=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_RSA_SOFTWARE_EXP=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -77,3 +77,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -87,3 +87,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -86,3 +86,4 @@ CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -85,3 +85,4 @@ CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_SOFTWARE_EXP=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -92,3 +92,4 @@ CONFIG_USB_ETHER_ASIX=y
|
||||
CONFIG_USB_ETHER_ASIX88179=y
|
||||
CONFIG_USB_ETHER_RTL8152=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -68,3 +68,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_RSA_SOFTWARE_EXP=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -69,3 +69,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -76,3 +76,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -68,3 +68,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -75,3 +75,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -66,3 +66,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_RSA_SOFTWARE_EXP=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -67,3 +67,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -72,3 +72,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -65,3 +65,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -89,3 +89,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -66,3 +66,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_RSA_SOFTWARE_EXP=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -71,3 +71,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -82,3 +82,4 @@ CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_SOFTWARE_EXP=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -87,3 +87,4 @@ CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -85,3 +85,4 @@ CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_SOFTWARE_EXP=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -91,3 +91,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_WDT=y
|
||||
CONFIG_WDT_SBSA=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -76,3 +76,4 @@ CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_SOFTWARE_EXP=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -86,3 +86,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_WDT=y
|
||||
CONFIG_WDT_SBSA=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -85,3 +85,4 @@ CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_EFI_MM_COMM_TEE=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -88,3 +88,4 @@ CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_SOFTWARE_EXP=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -95,3 +95,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_WDT=y
|
||||
CONFIG_WDT_SBSA=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -96,3 +96,4 @@ CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_WDT=y
|
||||
CONFIG_WDT_SBSA=y
|
||||
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
|
||||
CONFIG_FSL_USE_PCA9547_MUX=y
|
||||
|
@ -386,7 +386,7 @@ unsigned long get_board_ddr_clk(void);
|
||||
"kernel_start=0x1000000\0" \
|
||||
"kernel_load=0xa0000000\0" \
|
||||
"kernel_size=0x2800000\0" \
|
||||
"mcinitcmd=sf probe 0:0;sf read 0xa0a00000 0xa00000 0x100000;" \
|
||||
"mcinitcmd=sf probe 0:0;sf read 0xa0a00000 0xa00000 0x200000;" \
|
||||
"sf read 0xa0640000 0x640000 0x4000; esbc_validate 0xa0640000;" \
|
||||
"sf read 0xa0e00000 0xe00000 0x100000;" \
|
||||
"sf read 0xa0680000 0x680000 0x4000;esbc_validate 0xa0680000;" \
|
||||
@ -395,13 +395,13 @@ unsigned long get_board_ddr_clk(void);
|
||||
#else /* if !(CONFIG_NXP_ESBC) */
|
||||
#ifdef CONFIG_TFABOOT
|
||||
#define QSPI_MC_INIT_CMD \
|
||||
"sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \
|
||||
"sf read 0x80100000 0xE00000 0x100000;" \
|
||||
"fsl_mc start mc 0x80000000 0x80100000\0"
|
||||
"sf probe 0:0;sf read 0x80a00000 0xA00000 0x200000;" \
|
||||
"sf read 0x80e00000 0xE00000 0x100000;" \
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000\0"
|
||||
#define SD_MC_INIT_CMD \
|
||||
"mmcinfo;mmc read 0x80000000 0x5000 0x800;" \
|
||||
"mmc read 0x80100000 0x7000 0x800;" \
|
||||
"fsl_mc start mc 0x80000000 0x80100000\0"
|
||||
"mmcinfo;mmc read 0x80a00000 0x5000 0x1000;" \
|
||||
"mmc read 0x80e00000 0x7000 0x800;" \
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000\0"
|
||||
#define IFC_MC_INIT_CMD \
|
||||
"fsl_mc start mc 0x580A00000 0x580E00000\0"
|
||||
|
||||
@ -421,9 +421,9 @@ unsigned long get_board_ddr_clk(void);
|
||||
"kernel_load=0xa0000000\0" \
|
||||
"kernel_size=0x2800000\0" \
|
||||
"kernel_size_sd=0x14000\0" \
|
||||
"mcinitcmd=sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \
|
||||
"sf read 0x80100000 0xE00000 0x100000;" \
|
||||
"fsl_mc start mc 0x80000000 0x80100000\0" \
|
||||
"mcinitcmd=sf probe 0:0;sf read 0x80a00000 0xA00000 0x200000;" \
|
||||
"sf read 0x80e00000 0xE00000 0x100000;" \
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000\0" \
|
||||
"mcmemsize=0x70000000 \0" \
|
||||
"BOARD=ls1088aqds\0" \
|
||||
"scriptaddr=0x80000000\0" \
|
||||
@ -480,9 +480,9 @@ unsigned long get_board_ddr_clk(void);
|
||||
"kernel_start=0x1000000\0" \
|
||||
"kernel_load=0xa0000000\0" \
|
||||
"kernel_size=0x2800000\0" \
|
||||
"mcinitcmd=sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \
|
||||
"sf read 0x80100000 0xE00000 0x100000;" \
|
||||
"fsl_mc start mc 0x80000000 0x80100000\0" \
|
||||
"mcinitcmd=sf probe 0:0;sf read 0x80a00000 0xA00000 0x200000;" \
|
||||
"sf read 0x80e00000 0xE00000 0x100000;" \
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000\0" \
|
||||
"mcmemsize=0x70000000 \0"
|
||||
#elif defined(CONFIG_SD_BOOT)
|
||||
#undef CONFIG_EXTRA_ENV_SETTINGS
|
||||
@ -498,9 +498,9 @@ unsigned long get_board_ddr_clk(void);
|
||||
"kernel_start=0x8000\0" \
|
||||
"kernel_load=0xa0000000\0" \
|
||||
"kernel_size=0x14000\0" \
|
||||
"mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;" \
|
||||
"mmc read 0x80100000 0x7000 0x800;" \
|
||||
"fsl_mc start mc 0x80000000 0x80100000\0" \
|
||||
"mcinitcmd=mmcinfo;mmc read 0x80a00000 0x5000 0x1000;" \
|
||||
"mmc read 0x80e00000 0x7000 0x800;" \
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000\0" \
|
||||
"mcmemsize=0x70000000 \0"
|
||||
#else /* NOR BOOT */
|
||||
#undef CONFIG_EXTRA_ENV_SETTINGS
|
||||
|
@ -261,45 +261,45 @@
|
||||
/* Initial environment variables */
|
||||
#ifdef CONFIG_TFABOOT
|
||||
#define QSPI_MC_INIT_CMD \
|
||||
"sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \
|
||||
"sf read 0x80100000 0xE00000 0x100000;" \
|
||||
"sf probe 0:0;sf read 0x80a00000 0xA00000 0x200000;" \
|
||||
"sf read 0x80e00000 0xE00000 0x100000;" \
|
||||
"env exists secureboot && " \
|
||||
"sf read 0x80640000 0x640000 0x40000 && " \
|
||||
"sf read 0x80680000 0x680000 0x40000 && " \
|
||||
"esbc_validate 0x80640000 && " \
|
||||
"esbc_validate 0x80680000 ;" \
|
||||
"fsl_mc start mc 0x80000000 0x80100000\0"
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000\0"
|
||||
#define SD_MC_INIT_CMD \
|
||||
"mmcinfo;mmc read 0x80000000 0x5000 0x800;" \
|
||||
"mmc read 0x80100000 0x7000 0x800;" \
|
||||
"mmcinfo;mmc read 0x80a00000 0x5000 0x1000;" \
|
||||
"mmc read 0x80e00000 0x7000 0x800;" \
|
||||
"env exists secureboot && " \
|
||||
"mmc read 0x80640000 0x3200 0x20 && " \
|
||||
"mmc read 0x80680000 0x3400 0x20 && " \
|
||||
"esbc_validate 0x80640000 && " \
|
||||
"esbc_validate 0x80680000 ;" \
|
||||
"fsl_mc start mc 0x80000000 0x80100000\0"
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000\0"
|
||||
#else
|
||||
#if defined(CONFIG_QSPI_BOOT)
|
||||
#define MC_INIT_CMD \
|
||||
"mcinitcmd=sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \
|
||||
"sf read 0x80100000 0xE00000 0x100000;" \
|
||||
"mcinitcmd=sf probe 0:0;sf read 0x80a00000 0xA00000 0x200000;" \
|
||||
"sf read 0x80e00000 0xE00000 0x100000;" \
|
||||
"env exists secureboot && " \
|
||||
"sf read 0x80640000 0x640000 0x40000 && " \
|
||||
"sf read 0x80680000 0x680000 0x40000 && " \
|
||||
"esbc_validate 0x80640000 && " \
|
||||
"esbc_validate 0x80680000 ;" \
|
||||
"fsl_mc start mc 0x80000000 0x80100000\0" \
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000\0" \
|
||||
"mcmemsize=0x70000000\0"
|
||||
#elif defined(CONFIG_SD_BOOT)
|
||||
#define MC_INIT_CMD \
|
||||
"mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;" \
|
||||
"mmc read 0x80100000 0x7000 0x800;" \
|
||||
"mcinitcmd=mmcinfo;mmc read 0x80a00000 0x5000 0x1000;" \
|
||||
"mmc read 0x80e00000 0x7000 0x800;" \
|
||||
"env exists secureboot && " \
|
||||
"mmc read 0x80640000 0x3200 0x20 && " \
|
||||
"mmc read 0x80680000 0x3400 0x20 && " \
|
||||
"esbc_validate 0x80640000 && " \
|
||||
"esbc_validate 0x80680000 ;" \
|
||||
"fsl_mc start mc 0x80000000 0x80100000\0" \
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000\0" \
|
||||
"mcmemsize=0x70000000\0"
|
||||
#endif
|
||||
#endif /* CONFIG_TFABOOT */
|
||||
|
@ -340,7 +340,7 @@ unsigned long get_board_ddr_clk(void);
|
||||
#else
|
||||
#ifdef CONFIG_TFABOOT
|
||||
#define SD_MC_INIT_CMD \
|
||||
"mmcinfo;mmc read 0x80a00000 0x5000 0x1200;" \
|
||||
"mmcinfo;mmc read 0x80a00000 0x5000 0x1000;" \
|
||||
"mmc read 0x80e00000 0x7000 0x800;" \
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000\0"
|
||||
#define IFC_MC_INIT_CMD \
|
||||
@ -413,9 +413,9 @@ unsigned long get_board_ddr_clk(void);
|
||||
"kernel_start=0x8000\0" \
|
||||
"kernel_load=0xa0000000\0" \
|
||||
"kernel_size=0x14000\0" \
|
||||
"mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;" \
|
||||
"mmc read 0x80100000 0x7000 0x800;" \
|
||||
"fsl_mc start mc 0x80000000 0x80100000\0" \
|
||||
"mcinitcmd=mmcinfo;mmc read 0x80a00000 0x5000 0x1000;" \
|
||||
"mmc read 0x80e00000 0x7000 0x800;" \
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000\0" \
|
||||
"mcmemsize=0x70000000 \0"
|
||||
#else
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
|
@ -314,11 +314,11 @@ unsigned long get_board_sys_clk(void);
|
||||
"env exists secureboot && " \
|
||||
"esbc_validate 0x80640000 && " \
|
||||
"esbc_validate 0x80680000; " \
|
||||
"sf read 0x80a00000 0xa00000 0x300000; " \
|
||||
"sf read 0x80a00000 0xa00000 0x200000; " \
|
||||
"sf read 0x80e00000 0xe00000 0x100000; " \
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000 \0"
|
||||
#define SD_MC_INIT_CMD \
|
||||
"mmcinfo;mmc read 0x80a00000 0x5000 0x1200;" \
|
||||
"mmcinfo;mmc read 0x80a00000 0x5000 0x1000;" \
|
||||
"mmc read 0x80e00000 0x7000 0x800;" \
|
||||
"env exists secureboot && " \
|
||||
"mmc read 0x80640000 0x3200 0x20 && " \
|
||||
@ -339,19 +339,19 @@ unsigned long get_board_sys_clk(void);
|
||||
"env exists secureboot && " \
|
||||
"esbc_validate 0x80640000 && " \
|
||||
"esbc_validate 0x80680000; " \
|
||||
"sf read 0x80a00000 0xa00000 0x300000; " \
|
||||
"sf read 0x80a00000 0xa00000 0x200000; " \
|
||||
"sf read 0x80e00000 0xe00000 0x100000; " \
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000 \0"
|
||||
#elif defined(CONFIG_SD_BOOT)
|
||||
#define MC_INIT_CMD \
|
||||
"mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;" \
|
||||
"mmc read 0x80100000 0x7000 0x800;" \
|
||||
"mcinitcmd=mmcinfo;mmc read 0x80a00000 0x5000 0x1000;" \
|
||||
"mmc read 0x80e00000 0x7000 0x800;" \
|
||||
"env exists secureboot && " \
|
||||
"mmc read 0x80640000 0x3200 0x20 && " \
|
||||
"mmc read 0x80680000 0x3400 0x20 && " \
|
||||
"esbc_validate 0x80640000 && " \
|
||||
"esbc_validate 0x80680000 ;" \
|
||||
"fsl_mc start mc 0x80000000 0x80100000\0" \
|
||||
"fsl_mc start mc 0x80a00000 0x80e00000\0" \
|
||||
"mcmemsize=0x70000000\0"
|
||||
#else
|
||||
#define MC_INIT_CMD \
|
||||
|
Loading…
Reference in New Issue
Block a user