sh: Add Renesas rsk7264 board
The rsk7264 (also know as rsk2+sh7264) is an SH2A based board with 64MB NAND flash and 64MB SDRAM. It is very similar to the rsk7203 board. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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committed by
Nobuhiro Iwamatsu
parent
fa82f871c8
commit
7fbeb6422d
@@ -177,7 +177,8 @@ struct uart_port {
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#elif defined(CONFIG_CPU_SH7201) || \
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defined(CONFIG_CPU_SH7203) || \
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defined(CONFIG_CPU_SH7206) || \
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defined(CONFIG_CPU_SH7263)
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defined(CONFIG_CPU_SH7263) || \
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defined(CONFIG_CPU_SH7264)
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# define SCSPTR0 0xfffe8020 /* 16 bit SCIF */
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# define SCSPTR1 0xfffe8820 /* 16 bit SCIF */
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# define SCSPTR2 0xfffe9020 /* 16 bit SCIF */
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@@ -685,6 +686,8 @@ static inline int scbrr_calc(struct uart_port port, int bps, int clk)
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#define SCBRR_VALUE(bps, clk) scbrr_calc(sh_sci, bps, clk)
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#elif defined(__H8300H__) || defined(__H8300S__)
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#define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
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#elif defined(CONFIG_CPU_SH7264)
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#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps))
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#else /* Generic SH */
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#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
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#endif
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