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powerpc: mpc8540: Remove macro CONFIG_MPC8540

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Replace CONFIG_MPC8540 with ARCH_MPC8540 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
York Sun
2016-11-16 11:13:06 -08:00
parent 30411e7cfc
commit 7f825218dc
11 changed files with 13 additions and 11 deletions
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4
arch/powerpc/cpu/mpc85xx/Kconfig
View File

@@ -60,6 +60,7 @@ config TARGET_MPC8536DS
config TARGET_MPC8540ADS
bool "Support MPC8540ADS"
select ARCH_MPC8540
config TARGET_MPC8541CDS
bool "Support MPC8541CDS"
@@ -193,6 +194,9 @@ config ARCH_C29X
config ARCH_MPC8536
bool
config ARCH_MPC8540
bool
config ARCH_MPC8544
bool

2
arch/powerpc/cpu/mpc85xx/cpu.c
View File

@@ -293,7 +293,7 @@ int checkcpu (void)
int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
/* Everything after the first generation of PQ3 parts has RSTCR */
#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_MPC8541) || \
defined(CONFIG_MPC8555) || defined(CONFIG_MPC8560)
unsigned long val, msr;

4
arch/powerpc/cpu/mpc85xx/speed.c
View File

@@ -625,7 +625,7 @@ void get_sys_info(sys_info_t *sys_info)
* for four times the clock divider values.
*/
lcrr_div *= 4;
#elif !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \
#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_MPC8541) && \
!defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560)
/*
* Yes, the entire PQ38 family use the same
@@ -681,7 +681,7 @@ int get_clocks (void)
* for that SOC. This information is taken from application note
* AN2919.
*/
#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_MPC8541) || \
defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555) || \
defined(CONFIG_P1022)
gd->arch.i2c1_clk = sys_info.freq_systembus;

2
arch/powerpc/include/asm/config_mpc85xx.h
View File

@@ -44,7 +44,7 @@
#define CONFIG_SYS_FSL_ERRATUM_A004508
#define CONFIG_SYS_FSL_ERRATUM_A005125
#elif defined(CONFIG_MPC8540)
#elif defined(CONFIG_ARCH_MPC8540)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 8
#define CONFIG_SYS_FSL_DDRC_GEN1

2
arch/powerpc/include/asm/fsl_lbc.h
View File

@@ -325,7 +325,7 @@ void lbc_sdram_init(void);
*/
#define LCRR_CLKDIV 0x0000001F
#define LCRR_CLKDIV_SHIFT 0
#if defined(CONFIG_MPC83xx) || defined (CONFIG_MPC8540) || \
#if defined(CONFIG_MPC83xx) || defined(CONFIG_ARCH_MPC8540) || \
defined(CONFIG_MPC8541) || defined (CONFIG_MPC8555) || \
defined(CONFIG_MPC8560)
#define LCRR_CLKDIV_2 0x00000002

2
arch/powerpc/include/asm/immap_85xx.h
View File

@@ -124,7 +124,7 @@ typedef struct ccsr_i2c {
u8 res[4096 - 1 * sizeof(struct fsl_i2c_base)];
} ccsr_i2c_t;
#if defined(CONFIG_MPC8540) || \
#if defined(CONFIG_ARCH_MPC8540) || \
defined(CONFIG_MPC8541) || \
defined(CONFIG_ARCH_MPC8548) || \
defined(CONFIG_MPC8555)