arm: dts: stm32mp15: alignment with v5.13
Device tree alignment with Linux kernel v5.13 - ARM: dts: stm32: Add PTP clock to Ethernet controller - ARM: dts: stm32: enable the analog filter for all I2C nodes in stm32mp151 - ARM: dts: stm32: fix usart 2 & 3 pinconf to wake up with flow control - ARM: dts: stm32: Add wakeup management on stm32mp15x UART nodes - ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151 - ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux - ARM: dts: stm32: Rename mmc controller nodes to mmc@ - ARM: dts: stm32: Add additional init state for SDMMC1 pins Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This commit is contained in:
Patrick Delaunay
parent
80cfc6c692
commit
7e54934532
@ -1273,6 +1273,18 @@
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};
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};
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sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
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pins1 {
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pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
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<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
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<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
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<STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
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slew-rate = <1>;
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drive-push-pull;
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bias-disable;
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};
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};
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sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
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pins {
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pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
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@ -1299,6 +1311,17 @@
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};
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};
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sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
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pins1 {
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pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
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<STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
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<STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
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slew-rate = <1>;
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drive-push-pull;
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bias-pull-up;
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};
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};
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sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
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pins {
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pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
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@ -1868,10 +1891,15 @@
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usart2_idle_pins_c: usart2-idle-2 {
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pins1 {
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pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
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<STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
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<STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
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};
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pins2 {
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pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
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bias-disable;
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drive-push-pull;
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slew-rate = <3>;
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};
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pins3 {
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pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
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bias-disable;
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};
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@ -1917,10 +1945,15 @@
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usart3_idle_pins_b: usart3-idle-1 {
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pins1 {
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pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
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<STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
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<STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */
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};
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pins2 {
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pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins3 {
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pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
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bias-disable;
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};
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@ -1953,10 +1986,15 @@
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usart3_idle_pins_c: usart3-idle-2 {
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pins1 {
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pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
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<STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
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<STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
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};
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pins2 {
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pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins3 {
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pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
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bias-disable;
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};
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@ -2018,6 +2056,23 @@
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};
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};
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i2c6_pins_a: i2c6-0 {
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pins {
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pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
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<STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */
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bias-disable;
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drive-open-drain;
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slew-rate = <0>;
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};
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};
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i2c6_sleep_pins_a: i2c6-sleep-0 {
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pins {
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pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
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<STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */
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};
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};
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spi1_pins_a: spi1-0 {
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pins1 {
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pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
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@ -470,32 +470,36 @@
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usart2: serial@4000e000 {
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compatible = "st,stm32h7-uart";
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reg = <0x4000e000 0x400>;
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interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
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interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc USART2_K>;
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wakeup-source;
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status = "disabled";
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};
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usart3: serial@4000f000 {
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compatible = "st,stm32h7-uart";
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reg = <0x4000f000 0x400>;
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc USART3_K>;
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wakeup-source;
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status = "disabled";
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};
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uart4: serial@40010000 {
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compatible = "st,stm32h7-uart";
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reg = <0x40010000 0x400>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc UART4_K>;
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wakeup-source;
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status = "disabled";
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};
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uart5: serial@40011000 {
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compatible = "st,stm32h7-uart";
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reg = <0x40011000 0x400>;
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interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
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interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc UART5_K>;
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wakeup-source;
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status = "disabled";
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};
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@ -511,6 +515,7 @@
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#size-cells = <0>;
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st,syscfg-fmp = <&syscfg 0x4 0x1>;
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wakeup-source;
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i2c-analog-filter;
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status = "disabled";
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};
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@ -526,6 +531,7 @@
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#size-cells = <0>;
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st,syscfg-fmp = <&syscfg 0x4 0x2>;
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wakeup-source;
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i2c-analog-filter;
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status = "disabled";
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};
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@ -541,6 +547,7 @@
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#size-cells = <0>;
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st,syscfg-fmp = <&syscfg 0x4 0x4>;
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wakeup-source;
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i2c-analog-filter;
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status = "disabled";
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};
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@ -556,6 +563,7 @@
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#size-cells = <0>;
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st,syscfg-fmp = <&syscfg 0x4 0x10>;
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wakeup-source;
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i2c-analog-filter;
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status = "disabled";
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};
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@ -595,16 +603,18 @@
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uart7: serial@40018000 {
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compatible = "st,stm32h7-uart";
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reg = <0x40018000 0x400>;
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interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
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interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc UART7_K>;
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wakeup-source;
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status = "disabled";
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};
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uart8: serial@40019000 {
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compatible = "st,stm32h7-uart";
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reg = <0x40019000 0x400>;
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc UART8_K>;
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wakeup-source;
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status = "disabled";
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};
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@ -683,8 +693,9 @@
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usart6: serial@44003000 {
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compatible = "st,stm32h7-uart";
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reg = <0x44003000 0x400>;
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interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc USART6_K>;
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wakeup-source;
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status = "disabled";
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};
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@ -1065,7 +1076,7 @@
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};
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};
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sdmmc3: sdmmc@48004000 {
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sdmmc3: mmc@48004000 {
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compatible = "arm,pl18x", "arm,primecell";
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arm,primecell-periphid = <0x00253180>;
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reg = <0x48004000 0x400>;
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@ -1398,7 +1409,7 @@
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status = "disabled";
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};
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sdmmc1: sdmmc@58005000 {
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sdmmc1: mmc@58005000 {
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compatible = "arm,pl18x", "arm,primecell";
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arm,primecell-periphid = <0x00253180>;
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reg = <0x58005000 0x1000>;
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@ -1413,7 +1424,7 @@
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status = "disabled";
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};
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sdmmc2: sdmmc@58007000 {
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sdmmc2: mmc@58007000 {
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compatible = "arm,pl18x", "arm,primecell";
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arm,primecell-periphid = <0x00253180>;
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reg = <0x58007000 0x1000>;
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@ -1451,11 +1462,13 @@
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"mac-clk-tx",
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"mac-clk-rx",
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"eth-ck",
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"ptp_ref",
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"ethstp";
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clocks = <&rcc ETHMAC>,
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<&rcc ETHTX>,
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<&rcc ETHRX>,
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<&rcc ETHCK_K>,
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<&rcc ETHPTP_K>,
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<&rcc ETHSTP>;
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st,syscon = <&syscfg 0x4>;
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snps,mixed-burst;
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@ -1512,6 +1525,7 @@
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usbphyc: usbphyc@5a006000 {
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#address-cells = <1>;
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#size-cells = <0>;
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#clock-cells = <0>;
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compatible = "st,stm32mp1-usbphyc";
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reg = <0x5a006000 0x1000>;
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clocks = <&rcc USBPHY_K>;
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@ -1534,8 +1548,9 @@
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usart1: serial@5c000000 {
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compatible = "st,stm32h7-uart";
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reg = <0x5c000000 0x400>;
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc USART1_K>;
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wakeup-source;
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status = "disabled";
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};
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@ -1565,6 +1580,7 @@
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#size-cells = <0>;
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st,syscfg-fmp = <&syscfg 0x4 0x8>;
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wakeup-source;
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i2c-analog-filter;
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status = "disabled";
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};
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@ -1605,6 +1621,7 @@
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#size-cells = <0>;
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st,syscfg-fmp = <&syscfg 0x4 0x20>;
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wakeup-source;
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i2c-analog-filter;
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status = "disabled";
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};
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