Move CONFIG_PANIC_HANG to Kconfig
Freescale (NXP) boards have lots of defconfig files per board. I used "imply PANIC_HANG" for them. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
committed by
Tom Rini
parent
48a346061d
commit
7e3caa81e0
@@ -173,7 +173,6 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/*
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* Config the L3 Cache as L3 SRAM
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@@ -117,7 +117,6 @@
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#define CONFIG_SYS_MEMTEST_START 0x00200000
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_PANIC_HANG
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/* DDR Setup */
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#define CONFIG_DDR_SPD
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@@ -69,7 +69,6 @@
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#define CONFIG_SYS_MEMTEST_START 0x00010000 /* skip exception vectors */
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#define CONFIG_SYS_MEMTEST_END 0x1f000000 /* skip u-boot at top of RAM */
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/*
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* Config the L2 Cache as L2 SRAM
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@@ -46,7 +46,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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#define CONFIG_SYS_CCSRBAR 0xe0000000
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#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
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@@ -58,7 +58,6 @@
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#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x7fffffff
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/*
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* Config the L2 Cache as L2 SRAM
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@@ -215,7 +215,6 @@
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x1fffffff
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/* DDR Setup */
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#define CONFIG_SYS_DDR_RAW_TIMING
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@@ -52,8 +52,6 @@ extern unsigned long get_clock_freq(void);
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#define CONFIG_SYS_MEMTEST_START 0x01000000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x02000000
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/* Implement conversion of addresses in the LBC */
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#define CONFIG_SYS_LBC_LBCR 0x00000000
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#define CONFIG_SYS_LBC_LCRR LCRR_CLKDIV_8
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@@ -116,7 +116,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/*
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* Config the L3 Cache as L3 SRAM
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@@ -196,7 +196,6 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/*
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* Config the L3 Cache as L3 SRAM
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@@ -219,7 +219,6 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/*
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* Config the L3 Cache as L3 SRAM
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@@ -127,7 +127,6 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/*
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* Config the L3 Cache as L3 SRAM
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@@ -226,7 +226,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/*
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* Config the L3 Cache as L3 SRAM
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@@ -96,7 +96,6 @@
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/*
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* Config the L3 Cache as L3 SRAM
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@@ -136,7 +136,6 @@
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x1fffffff
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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#define CONFIG_SYS_CCSRBAR 0xffe00000
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#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
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@@ -21,7 +21,6 @@
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#define CONFIG_SKIP_TRUNOFF_WATCHDOG
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_PANIC_HANG
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#define CONFIG_ARCH_MAP_SYSMEM
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@@ -128,7 +128,6 @@
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/*
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* Config the L3 Cache as L3 SRAM
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@@ -89,7 +89,6 @@
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/*
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* Config the L3 Cache as L3 SRAM
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@@ -117,7 +117,6 @@
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_MAXARGS 64 /* max command args */
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#define CONFIG_PANIC_HANG
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
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#include <asm/arch/soc.h>
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@@ -223,8 +223,6 @@ unsigned long long get_qixis_addr(void);
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_MAXARGS 64 /* max command args */
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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#ifdef CONFIG_SPL
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#define CONFIG_SPL_BSS_START_ADDR 0x80100000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
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@@ -221,8 +221,6 @@ unsigned long long get_qixis_addr(void);
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_MAXARGS 64 /* max command args */
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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#define CONFIG_SPL_BSS_START_ADDR 0x80100000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
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#define CONFIG_SPL_FRAMEWORK
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@@ -270,7 +270,6 @@
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x1fffffff
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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#define CONFIG_SYS_CCSRBAR 0xffe00000
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#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
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@@ -69,7 +69,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x1fffffff
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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#define CONFIG_SYS_CCSRBAR 0xffe00000
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#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
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@@ -31,7 +31,6 @@
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/* Needed to fill the ccsrbar pointer */
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@@ -54,7 +54,6 @@
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#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x00400000
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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/*
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* Config the L3 Cache as L3 SRAM
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@@ -90,7 +90,6 @@
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/* hang() the board on panic() */
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#define CONFIG_PANIC_HANG
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/* environment placement (for NAND), is different for FLASHCARD but does not
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* harm there */
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@@ -218,8 +218,6 @@
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/* for LD20; the last 64 byte is used for dynamic DDR PHY training */
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#define CONFIG_SYS_MEM_TOP_HIDE 64
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#define CONFIG_PANIC_HANG
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)
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/* only for SPL */
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@@ -487,7 +487,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
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#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
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#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
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#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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#define CONFIG_PREBOOT /* enable preboot variable */
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#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
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@@ -291,7 +291,6 @@
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#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
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#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
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#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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#define CONFIG_PREBOOT /* enable preboot variable */
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#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
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#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
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@@ -341,7 +341,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
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#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
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#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
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#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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#define CONFIG_PREBOOT /* enable preboot variable */
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#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
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@@ -339,7 +339,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
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#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
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#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
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#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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#define CONFIG_PREBOOT /* enable preboot variable */
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#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
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@@ -130,10 +130,6 @@
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#define CONFIG_MX_CYCLIC
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#define CONFIG_SHOW_BOOT_PROGRESS
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#ifdef DEBUG
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#define CONFIG_PANIC_HANG 1 /* Require manual reboot */
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#endif
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/*=========================================*/
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/* FPGA Registers (board info and control) */
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