From 7dfc4dbd2d1592ee420945afe6a82003c374b0de Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Fri, 21 Feb 2014 08:55:47 +0800 Subject: [PATCH] spi: atmel_dataflash: Simplify AT91F_SpiEnable implementation Refactor the code a bit to make it better in readability. Remove the comments because now the intention of the code is pretty clear. Signed-off-by: Axel Lin Reviewed-by: Jagannadha Sutradharudu Teki --- drivers/spi/atmel_dataflash_spi.c | 31 ++++++++++++------------------- 1 file changed, 12 insertions(+), 19 deletions(-) diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c index 8a5eddcbfd..a2e9c00ea6 100644 --- a/drivers/spi/atmel_dataflash_spi.c +++ b/drivers/spi/atmel_dataflash_spi.c @@ -102,33 +102,26 @@ void AT91F_SpiEnable(int cs) { unsigned long mode; + mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR); + mode &= ~AT91_SPI_PCS; + switch (cs) { - case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */ - mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR); - mode &= 0xFFF0FFFF; - writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD<<16) & AT91_SPI_PCS), - ATMEL_BASE_SPI0 + AT91_SPI_MR); + case 0: + mode |= AT91_SPI_PCS0_DATAFLASH_CARD << 16; break; - case 1: /* Configure SPI CS1 for Serial DataFlash AT45DBxx */ - mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR); - mode &= 0xFFF0FFFF; - writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) & AT91_SPI_PCS), - ATMEL_BASE_SPI0 + AT91_SPI_MR); + case 1: + mode |= AT91_SPI_PCS1_DATAFLASH_CARD << 16; break; - case 2: /* Configure SPI CS2 for Serial DataFlash AT45DBxx */ - mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR); - mode &= 0xFFF0FFFF; - writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD<<16) & AT91_SPI_PCS), - ATMEL_BASE_SPI0 + AT91_SPI_MR); + case 2: + mode |= AT91_SPI_PCS2_DATAFLASH_CARD << 16; break; case 3: - mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR); - mode &= 0xFFF0FFFF; - writel(mode | ((AT91_SPI_PCS3_DATAFLASH_CARD<<16) & AT91_SPI_PCS), - ATMEL_BASE_SPI0 + AT91_SPI_MR); + mode |= AT91_SPI_PCS3_DATAFLASH_CARD << 16; break; } + writel(mode, ATMEL_BASE_SPI0 + AT91_SPI_MR); + /* SPI_Enable */ writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR); }