arm: mach-omap2: cache: Explicitly enable I cache
omap-common cache enabling sequence relies on cpu_init_cp15() (inside start.S) for enabling I-caches. But cpu_init_cp15() can be skipped if CONFIG_SKIP_LOWLEVEL_INIT is defined. So enable I-caches if not enabled already. Debugged-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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@ -44,7 +44,11 @@ DECLARE_GLOBAL_DATA_PTR;
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void enable_caches(void)
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{
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/* Enable D-cache. I-cache is already enabled in start.S */
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/* Enable I cache if not enabled */
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if (!icache_status())
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icache_enable();
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dcache_enable();
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}
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