ARM: zynq: Do not include full zynq-7000.dtsi to cse-nor configuration
There is no real need to include full DT when only some nodes are enough to use. It will save some space. Retested with FSBL for initial SoC setup. SPL didn't work. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -5,7 +5,6 @@
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* Copyright (C) 2018 Xilinx, Inc.
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*/
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/dts-v1/;
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#include "zynq-7000.dtsi"
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/ {
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#address-cells = <1>;
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@ -33,27 +32,21 @@
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};
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amba: amba {
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u-boot,dm-pre-reloc;
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&intc>;
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ranges;
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intc: interrupt-controller@f8f01000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0xF8F01000 0x1000>,
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<0xF8F00100 0x100>;
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};
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slcr: slcr@f8000000 {
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u-boot,dm-pre-reloc;
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
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reg = <0xF8000000 0x1000>;
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ranges;
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clkc: clkc@100 {
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u-boot,dm-pre-reloc;
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#clock-cells = <1>;
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compatible = "xlnx,ps7-clkc";
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clock-output-names = "armpll", "ddrpll",
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