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x86: baytrail: Add GPIO ASL description

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Since BayTrail, Intel starts to use new GPIO IPs in their chipset.
This adds the GPIO ASL, so that OS can load corresponding drivers
for it. On Linux, this is BayTrail pinctrl driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2016-05-11 07:45:11 -07:00
parent fa427438bd
commit 7bfe0da4d2
2 changed files with 98 additions and 0 deletions
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95
arch/x86/include/asm/arch-baytrail/acpi/gpio.asl Normal file
View File

@ -0,0 +1,95 @@
/*
* Copyright (C) 2013 Google Inc.
* Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
*
* Modified from coreboot src/soc/intel/baytrail/acpi/gpio.asl
*
* SPDX-License-Identifier: GPL-2.0+
*/
/* SouthCluster GPIO */
Device (GPSC)
{
Name(_HID, "INT33FC")
Name(_CID, "INT33FC")
Name(_UID, 1)
Name(RBUF, ResourceTemplate()
{
Memory32Fixed(ReadWrite, 0, 0x1000, RMEM)
Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , ,)
{
GPIO_SC_IRQ
}
})
Method(_CRS)
{
CreateDwordField(^RBUF, ^RMEM._BAS, RBAS)
Add(IO_BASE_ADDRESS, IO_BASE_OFFSET_GPSCORE, RBAS)
Return (^RBUF)
}
Method(_STA)
{
Return (STA_VISIBLE)
}
}
/* NorthCluster GPIO */
Device (GPNC)
{
Name(_HID, "INT33FC")
Name(_CID, "INT33FC")
Name(_UID, 2)
Name(RBUF, ResourceTemplate()
{
Memory32Fixed(ReadWrite, 0, 0x1000, RMEM)
Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , ,)
{
GPIO_NC_IRQ
}
})
Method(_CRS)
{
CreateDwordField(^RBUF, ^RMEM._BAS, RBAS)
Add(IO_BASE_ADDRESS, IO_BASE_OFFSET_GPNCORE, RBAS)
Return (^RBUF)
}
Method(_STA)
{
Return (STA_VISIBLE)
}
}
/* SUS GPIO */
Device (GPSS)
{
Name(_HID, "INT33FC")
Name(_CID, "INT33FC")
Name(_UID, 3)
Name(RBUF, ResourceTemplate()
{
Memory32Fixed(ReadWrite, 0, 0x1000, RMEM)
Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , ,)
{
GPIO_SUS_IRQ
}
})
Method(_CRS)
{
CreateDwordField(^RBUF, ^RMEM._BAS, RBAS)
Add(IO_BASE_ADDRESS, IO_BASE_OFFSET_GPSSUS, RBAS)
Return (^RBUF)
}
Method(_STA)
{
Return (STA_VISIBLE)
}
}

3
arch/x86/include/asm/arch-baytrail/acpi/platform.asl
View File

@ -27,6 +27,9 @@ Method(_WAK, 1)
Scope (\_SB)
{
#include "southcluster.asl"
/* ACPI devices */
#include "gpio.asl"
}
/* Chipset specific sleep states */