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spi: add common fdt SPI driver interface

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Add a common interface to fdt based SPI drivers.  Each driver is
represented by a table entry in fdt_spi_drivers[].  If there are
multiple SPI drivers in the table, the first driver to return success
from spi_init() will be registered as the SPI driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Allen Martin 2013-03-16 18:58:07 +00:00 committed by Tom Warren
parent 6b3a03e112
commit 78f47b7353
8 changed files with 224 additions and 46 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
arch/arm/include/asm/arch-tegra20/tegra20_sflash.h
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@ -27,4 +27,15 @@
#include <asm/types.h>
int tegra20_spi_cs_is_valid(unsigned int bus, unsigned int cs);
struct spi_slave *tegra20_spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode);
void tegra20_spi_free_slave(struct spi_slave *slave);
int tegra20_spi_init(int *node_list, int count);
int tegra20_spi_claim_bus(struct spi_slave *slave);
void tegra20_spi_cs_activate(struct spi_slave *slave);
void tegra20_spi_cs_deactivate(struct spi_slave *slave);
int tegra20_spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *data_out, void *data_in, unsigned long flags);
#endif /* _TEGRA20_SPI_H_ */

11
arch/arm/include/asm/arch-tegra20/tegra20_slink.h
View File

@ -27,4 +27,15 @@
#include <asm/types.h>
int tegra30_spi_init(int *node_list, int count);
int tegra30_spi_cs_is_valid(unsigned int bus, unsigned int cs);
struct spi_slave *tegra30_spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode);
void tegra30_spi_free_slave(struct spi_slave *slave);
int tegra30_spi_claim_bus(struct spi_slave *slave);
void tegra30_spi_cs_activate(struct spi_slave *slave);
void tegra30_spi_cs_deactivate(struct spi_slave *slave);
int tegra30_spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *data_out, void *data_in, unsigned long flags);
#endif /* _TEGRA30_SPI_H_ */

2
board/nvidia/common/board.c
View File

@ -132,7 +132,7 @@ int board_init(void)
clock_init();
clock_verify();
#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK)
#ifdef CONFIG_FDT_SPI
pin_mux_spi();
spi_init();
#endif

1
drivers/spi/Makefile
View File

@ -46,6 +46,7 @@ COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o
COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
COBJS-$(CONFIG_SH_SPI) += sh_spi.o
COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
COBJS-$(CONFIG_FDT_SPI) += fdt_spi.o
COBJS-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
COBJS-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o

171
drivers/spi/fdt_spi.c Normal file
View File

@ -0,0 +1,171 @@
/*
* Common fdt based SPI driver front end
*
* Copyright (c) 2013 NVIDIA Corporation
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <malloc.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/arch/clock.h>
#include <asm/arch-tegra/clk_rst.h>
#include <asm/arch-tegra20/tegra20_sflash.h>
#include <asm/arch-tegra20/tegra20_slink.h>
#include <spi.h>
#include <fdtdec.h>
DECLARE_GLOBAL_DATA_PTR;
struct fdt_spi_driver {
int compat;
int max_ctrls;
int (*init)(int *node_list, int count);
int (*claim_bus)(struct spi_slave *slave);
int (*release_bus)(struct spi_slave *slave);
int (*cs_is_valid)(unsigned int bus, unsigned int cs);
struct spi_slave *(*setup_slave)(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode);
void (*free_slave)(struct spi_slave *slave);
void (*cs_activate)(struct spi_slave *slave);
void (*cs_deactivate)(struct spi_slave *slave);
int (*xfer)(struct spi_slave *slave, unsigned int bitlen,
const void *data_out, void *data_in, unsigned long flags);
};
static struct fdt_spi_driver fdt_spi_drivers[] = {
#ifdef CONFIG_TEGRA20_SFLASH
{
.compat = COMPAT_NVIDIA_TEGRA20_SFLASH,
.max_ctrls = 1,
.init = tegra20_spi_init,
.claim_bus = tegra20_spi_claim_bus,
.cs_is_valid = tegra20_spi_cs_is_valid,
.setup_slave = tegra20_spi_setup_slave,
.free_slave = tegra20_spi_free_slave,
.cs_activate = tegra20_spi_cs_activate,
.cs_deactivate = tegra20_spi_cs_deactivate,
.xfer = tegra20_spi_xfer,
},
#endif
#ifdef CONFIG_TEGRA20_SLINK
{
.compat = COMPAT_NVIDIA_TEGRA20_SLINK,
.max_ctrls = CONFIG_TEGRA_SLINK_CTRLS,
.init = tegra30_spi_init,
.claim_bus = tegra30_spi_claim_bus,
.cs_is_valid = tegra30_spi_cs_is_valid,
.setup_slave = tegra30_spi_setup_slave,
.free_slave = tegra30_spi_free_slave,
.cs_activate = tegra30_spi_cs_activate,
.cs_deactivate = tegra30_spi_cs_deactivate,
.xfer = tegra30_spi_xfer,
},
#endif
};
static struct fdt_spi_driver *driver;
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
if (!driver)
return 0;
else if (!driver->cs_is_valid)
return 1;
else
return driver->cs_is_valid(bus, cs);
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
if (!driver || !driver->setup_slave)
return NULL;
return driver->setup_slave(bus, cs, max_hz, mode);
}
void spi_free_slave(struct spi_slave *slave)
{
if (driver && driver->free_slave)
return driver->free_slave(slave);
}
static int spi_init_driver(struct fdt_spi_driver *driver)
{
int count;
int node_list[driver->max_ctrls];
count = fdtdec_find_aliases_for_id(gd->fdt_blob, "spi",
driver->compat,
node_list,
driver->max_ctrls);
return driver->init(node_list, count);
}
void spi_init(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(fdt_spi_drivers); i++) {
driver = &fdt_spi_drivers[i];
if (!spi_init_driver(driver))
break;
}
if (i == ARRAY_SIZE(fdt_spi_drivers))
driver = NULL;
}
int spi_claim_bus(struct spi_slave *slave)
{
if (!driver)
return 1;
if (!driver->claim_bus)
return 0;
return driver->claim_bus(slave);
}
void spi_release_bus(struct spi_slave *slave)
{
if (driver && driver->release_bus)
driver->release_bus(slave);
}
void spi_cs_activate(struct spi_slave *slave)
{
if (driver && driver->cs_activate)
driver->cs_activate(slave);
}
void spi_cs_deactivate(struct spi_slave *slave)
{
if (driver && driver->cs_deactivate)
driver->cs_deactivate(slave);
}
int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *data_out, void *data_in, unsigned long flags)
{
if (!driver || !driver->xfer)
return -1;
return driver->xfer(slave, bitlen, data_out, data_in, flags);
}

41
drivers/spi/tegra20_sflash.c
View File

@ -101,7 +101,7 @@ static inline struct tegra_spi_slave *to_tegra_spi(struct spi_slave *slave)
return container_of(slave, struct tegra_spi_slave, slave);
}
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
int tegra20_spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
/* Tegra20 SPI-Flash - only 1 device ('bus/cs') */
if (bus != 0 || cs != 0)
@ -110,8 +110,8 @@ int spi_cs_is_valid(unsigned int bus, unsigned int cs)
return 1;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
struct spi_slave *tegra20_spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct tegra_spi_slave *spi;
@ -151,25 +151,20 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
return &spi->slave;
}
void spi_free_slave(struct spi_slave *slave)
void tegra20_spi_free_slave(struct spi_slave *slave)
{
struct tegra_spi_slave *spi = to_tegra_spi(slave);
free(spi);
}
void spi_init(void)
int tegra20_spi_init(int *node_list, int count)
{
struct tegra_spi_ctrl *ctrl;
int i;
int node = 0;
int count;
int node_list[1];
int found = 0;
count = fdtdec_find_aliases_for_id(gd->fdt_blob, "spi",
COMPAT_NVIDIA_TEGRA20_SFLASH,
node_list,
1);
for (i = 0; i < count; i++) {
ctrl = &spi_ctrls[i];
node = node_list[i];
@ -193,13 +188,15 @@ void spi_init(void)
continue;
}
ctrl->valid = 1;
found = 1;
debug("%s: found controller at %p, freq = %u, periph_id = %d\n",
__func__, ctrl->regs, ctrl->freq, ctrl->periph_id);
}
return !found;
}
int spi_claim_bus(struct spi_slave *slave)
int tegra20_spi_claim_bus(struct spi_slave *slave)
{
struct tegra_spi_slave *spi = to_tegra_spi(slave);
struct spi_regs *regs = spi->ctrl->regs;
@ -213,7 +210,7 @@ int spi_claim_bus(struct spi_slave *slave)
reg = SPI_STAT_RDY | SPI_STAT_RXF_FLUSH | SPI_STAT_TXF_FLUSH | \
SPI_STAT_RXF_UNR | SPI_STAT_TXF_OVF;
writel(reg, &regs->status);
debug("spi_init: STATUS = %08x\n", readl(&regs->status));
debug("%s: STATUS = %08x\n", __func__, readl(&regs->status));
/*
* Use sw-controlled CS, so we can clock in data after ReadID, etc.
@ -223,7 +220,7 @@ int spi_claim_bus(struct spi_slave *slave)
reg |= 1 << SPI_CMD_ACTIVE_SCLK_SHIFT;
clrsetbits_le32(&regs->command, SPI_CMD_ACTIVE_SCLK_MASK |
SPI_CMD_ACTIVE_SDA_MASK, SPI_CMD_CS_SOFT | reg);
debug("spi_init: COMMAND = %08x\n", readl(&regs->command));
debug("%s: COMMAND = %08x\n", __func__, readl(&regs->command));
/*
* SPI pins on Tegra20 are muxed - change pinmux later due to UART
@ -236,17 +233,7 @@ int spi_claim_bus(struct spi_slave *slave)
return 0;
}
void spi_release_bus(struct spi_slave *slave)
{
/*
* We can't release UART_DISABLE and set pinmux to UART4 here since
* some code (e,g, spi_flash_probe) uses printf() while the SPI
* bus is held. That is arguably bad, but it has the advantage of
* already being in the source tree.
*/
}
void spi_cs_activate(struct spi_slave *slave)
void tegra20_spi_cs_activate(struct spi_slave *slave)
{
struct tegra_spi_slave *spi = to_tegra_spi(slave);
struct spi_regs *regs = spi->ctrl->regs;
@ -255,7 +242,7 @@ void spi_cs_activate(struct spi_slave *slave)
setbits_le32(&regs->command, SPI_CMD_CS_VAL);
}
void spi_cs_deactivate(struct spi_slave *slave)
void tegra20_spi_cs_deactivate(struct spi_slave *slave)
{
struct tegra_spi_slave *spi = to_tegra_spi(slave);
struct spi_regs *regs = spi->ctrl->regs;
@ -264,7 +251,7 @@ void spi_cs_deactivate(struct spi_slave *slave)
clrbits_le32(&regs->command, SPI_CMD_CS_VAL);
}
int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
int tegra20_spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *data_out, void *data_in, unsigned long flags)
{
struct tegra_spi_slave *spi = to_tegra_spi(slave);

29
drivers/spi/tegra20_slink.c
View File

@ -107,7 +107,7 @@ static inline struct tegra_spi_slave *to_tegra_spi(struct spi_slave *slave)
return container_of(slave, struct tegra_spi_slave, slave);
}
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
int tegra30_spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
if (bus >= CONFIG_TEGRA_SLINK_CTRLS || cs > 3 || !spi_ctrls[bus].valid)
return 0;
@ -115,7 +115,7 @@ int spi_cs_is_valid(unsigned int bus, unsigned int cs)
return 1;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
struct spi_slave *tegra30_spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct tegra_spi_slave *spi;
@ -159,25 +159,20 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
return &spi->slave;
}
void spi_free_slave(struct spi_slave *slave)
void tegra30_spi_free_slave(struct spi_slave *slave)
{
struct tegra_spi_slave *spi = to_tegra_spi(slave);
free(spi);
}
void spi_init(void)
int tegra30_spi_init(int *node_list, int count)
{
struct tegra_spi_ctrl *ctrl;
int i;
int node = 0;
int count;
int node_list[CONFIG_TEGRA_SLINK_CTRLS];
int found = 0;
count = fdtdec_find_aliases_for_id(gd->fdt_blob, "spi",
COMPAT_NVIDIA_TEGRA20_SLINK,
node_list,
CONFIG_TEGRA_SLINK_CTRLS);
for (i = 0; i < count; i++) {
ctrl = &spi_ctrls[i];
node = node_list[i];
@ -201,13 +196,15 @@ void spi_init(void)
continue;
}
ctrl->valid = 1;
found = 1;
debug("%s: found controller at %p, freq = %u, periph_id = %d\n",
__func__, ctrl->regs, ctrl->freq, ctrl->periph_id);
}
return !found;
}
int spi_claim_bus(struct spi_slave *slave)
int tegra30_spi_claim_bus(struct spi_slave *slave)
{
struct tegra_spi_slave *spi = to_tegra_spi(slave);
struct spi_regs *regs = spi->ctrl->regs;
@ -232,11 +229,7 @@ int spi_claim_bus(struct spi_slave *slave)
return 0;
}
void spi_release_bus(struct spi_slave *slave)
{
}
void spi_cs_activate(struct spi_slave *slave)
void tegra30_spi_cs_activate(struct spi_slave *slave)
{
struct tegra_spi_slave *spi = to_tegra_spi(slave);
struct spi_regs *regs = spi->ctrl->regs;
@ -245,7 +238,7 @@ void spi_cs_activate(struct spi_slave *slave)
setbits_le32(&regs->command, SLINK_CMD_CS_VAL);
}
void spi_cs_deactivate(struct spi_slave *slave)
void tegra30_spi_cs_deactivate(struct spi_slave *slave)
{
struct tegra_spi_slave *spi = to_tegra_spi(slave);
struct spi_regs *regs = spi->ctrl->regs;
@ -254,7 +247,7 @@ void spi_cs_deactivate(struct spi_slave *slave)
clrbits_le32(&regs->command, SLINK_CMD_CS_VAL);
}
int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
int tegra30_spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *data_out, void *data_in, unsigned long flags)
{
struct tegra_spi_slave *spi = to_tegra_spi(slave);

4
include/configs/tegra-common-post.h
View File

@ -150,6 +150,10 @@
MEM_LAYOUT_ENV_SETTINGS \
BOOTCMDS_COMMON
#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK)
#define CONFIG_FDT_SPI
#endif
/* overrides for SPL build here */
#ifdef CONFIG_SPL_BUILD