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x86: Remove HAVE_ACPI_RESUME

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These are currently dead codes. Until we have complete ACPI support,
we don't know if it works or not. Remove to avoid confusion.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2015-11-25 17:46:09 -08:00
parent d475d59020
commit 789fa275b3
6 changed files with 0 additions and 44 deletions
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9
arch/x86/cpu/ivybridge/cpu.c
View File

@ -298,16 +298,7 @@ int print_cpuinfo(void)
pm1_cnt = inl(DEFAULT_PMBASE + PM1_CNT);
if ((pm1_sts & WAK_STS) && ((pm1_cnt >> 10) & 7) == 5) {
#if CONFIG_HAVE_ACPI_RESUME
debug("Resume from S3 detected.\n");
boot_mode = PEI_BOOT_RESUME;
/* Clear SLP_TYPE. This will break stage2 but
* we care for that when we get there.
*/
outl(pm1_cnt & ~(7 << 10), DEFAULT_PMBASE + PM1_CNT);
#else
debug("Resume from S3 detected, but disabled.\n");
#endif
} else {
/*
* TODO: An indication of life might be possible here (e.g.

9
arch/x86/cpu/ivybridge/lpc.c
View File

@ -240,15 +240,6 @@ static void pch_rtc_init(pci_dev_t dev)
}
debug("rtc_failed = 0x%x\n", rtc_failed);
#if CONFIG_HAVE_ACPI_RESUME
/* Avoid clearing pending interrupts and resetting the RTC control
* register in the resume path because the Linux kernel relies on
* this to know if it should restart the RTC timerqueue if the wake
* was due to the RTC alarm.
*/
if (acpi_get_slp_type() == 3)
return;
#endif
/* TODO: Handle power failure */
if (rtc_failed)
printf("RTC power failed\n");

16
arch/x86/cpu/ivybridge/northbridge.c
View File

@ -169,20 +169,4 @@ void northbridge_init(pci_dev_t dev)
void northbridge_enable(pci_dev_t dev)
{
#if CONFIG_HAVE_ACPI_RESUME
switch (x86_pci_read_config32(dev, SKPAD)) {
case 0xcafebabe:
debug("Normal boot.\n");
apci_set_slp_type(0);
break;
case 0xcafed00d:
debug("S3 Resume.\n");
apci_set_slp_type(3);
break;
default:
debug("Unknown boot method, assuming normal.\n");
apci_set_slp_type(0);
break;
}
#endif
}

1
board/google/chromebook_link/Kconfig
View File

@ -19,7 +19,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select NORTHBRIDGE_INTEL_IVYBRIDGE
select HAVE_ACPI_RESUME
select BOARD_ROMSIZE_KB_8192
config PCIE_ECAM_BASE

1
board/google/chromebox_panther/Kconfig
View File

@ -20,7 +20,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select NORTHBRIDGE_INTEL_IVYBRIDGE
select HAVE_ACPI_RESUME
select BOARD_ROMSIZE_KB_8192
config SYS_CAR_ADDR

8
drivers/pci/pci_rom.c
View File

@ -33,10 +33,6 @@
#include <video_fb.h>
#include <linux/screen_info.h>
#ifdef CONFIG_HAVE_ACPI_RESUME
#include <asm/acpi.h>
#endif
__weak bool board_should_run_oprom(pci_dev_t dev)
{
return true;
@ -44,10 +40,6 @@ __weak bool board_should_run_oprom(pci_dev_t dev)
static bool should_load_oprom(pci_dev_t dev)
{
#ifdef CONFIG_HAVE_ACPI_RESUME
if (acpi_get_slp_type() == 3)
return false;
#endif
if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM))
return 1;
if (board_should_run_oprom(dev))