Merge git://git.denx.de/u-boot-fsl-qoriq

This commit is contained in:
Tom Rini
2018-06-12 13:25:24 -04:00
24 changed files with 603 additions and 60 deletions

View File

@@ -1034,6 +1034,19 @@ config TARGET_LS1012A2G5RDB
development platform that supports the QorIQ LS1012A
Layerscape Architecture processor.
config TARGET_LS1012AFRWY
bool "Support ls1012afrwy"
select ARCH_LS1012A
select BOARD_LATE_INIT
select ARM64
imply SCSI
imply SCSI_AHCI
help
Support for Freescale LS1012AFRWY platform.
The LS1012A FRWY board (FRWY) is a high-performance
development platform that supports the QorIQ LS1012A
Layerscape Architecture processor.
config TARGET_LS1012AFRDM
bool "Support ls1012afrdm"
select ARCH_LS1012A

View File

@@ -91,6 +91,7 @@ config PSCI_RESET
!TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \
!TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
!TARGET_LS1012A2G5RDB && !TARGET_LS1012AQDS && \
!TARGET_LS1012AFRWY && \
!TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \
!TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \
!TARGET_LS2081ARDB && \

View File

@@ -261,40 +261,6 @@ config SYS_LS_PPA_FW_IN_NAND
endchoice
config SYS_LS_PPA_FW_ADDR
hex "Address of PPA firmware loading from"
depends on FSL_LS_PPA
default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A
default 0x40400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT
default 0x580400000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A
default 0x20400000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1088A
default 0x60400000 if SYS_LS_PPA_FW_IN_XIP
default 0x400000 if SYS_LS_PPA_FW_IN_MMC
default 0x400000 if SYS_LS_PPA_FW_IN_NAND
help
If the PPA firmware locate at XIP flash, such as NOR or
QSPI flash, this address is a directly memory-mapped.
If it is in a serial accessed flash, such as NAND and SD
card, it is a byte offset.
config SYS_LS_PPA_ESBC_ADDR
hex "hdr address of PPA firmware loading from"
depends on FSL_LS_PPA && CHAIN_OF_TRUST
default 0x60680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A
default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A
default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A
default 0x20680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A
default 0x580680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A
default 0x20680000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1088A
default 0x680000 if SYS_LS_PPA_FW_IN_MMC
default 0x680000 if SYS_LS_PPA_FW_IN_NAND
help
If the PPA header firmware locate at XIP flash, such as NOR or
QSPI flash, this address is a directly memory-mapped.
If it is in a serial accessed flash, such as NAND and SD
card, it is a byte offset.
config LS_PPA_ESBC_HDR_SIZE
hex "Length of PPA ESBC header"
depends on FSL_LS_PPA && CHAIN_OF_TRUST && !SYS_LS_PPA_FW_IN_XIP

View File

@@ -229,7 +229,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1012a-qds.dtb \
fsl-ls1012a-rdb.dtb \
fsl-ls1012a-2g5rdb.dtb \
fsl-ls1012a-frdm.dtb
fsl-ls1012a-frdm.dtb \
fsl-ls1012a-frwy.dtb
dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb
dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb

View File

@@ -0,0 +1,43 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* NXP ls1012a FRWY board device tree source
*
* Copyright 2018 NXP
*
*/
/dts-v1/;
#include "fsl-ls1012a.dtsi"
/ {
model = "FRWY-LS1012A Board";
aliases {
spi0 = &qspi;
};
chosen {
stdout-path = &duart0;
};
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: w25q16dw@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <20000000>;
reg = <0>;
};
};
&i2c0 {
status = "okay";
};
&duart0 {
status = "okay";
};