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powerpc/T102xRDB: Enable ifc nand ecc encode and decode

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IFC nand ecc encode and decode mode are not correctly
set in CSOR register during nand initialization.Enable
ecc encode/decode in 4-bit mode

Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Jaiprakash Singh 2015-05-22 15:21:07 +05:30 committed by York Sun
parent 1ff10a87c3
commit 7842950f7c
1 changed files with 3 additions and 1 deletions
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4
include/configs/T102xRDB.h
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@ -395,7 +395,9 @@ unsigned long get_board_ddr_clk(void);
| CSOR_NAND_PB(64)) /*Pages Per Block = 64*/
#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
#elif defined(CONFIG_T1023RDB)
#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_RAL_3 /* RAL 3Bytes */ \
#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \
| CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \
| CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
| CSOR_NAND_RAL_3 /* RAL 3Bytes */ \
| CSOR_NAND_PGS_2K /* Page Size = 2K */ \
| CSOR_NAND_SPRZ_128 /* Spare size = 128 */ \